2.3.3.3 JTAG Connectors

The TSW14J56EVM includes three industry-standard JTAG connectors; one that connects to the JTAG ports of the FPGA, one that connects to the JTAG pins of the Cypress FX3 USB Contoller and the other that connects to the programming pins of the power monitor/sequencer device. Jumpers on the TSW14J56EVM allow for the FPGA to be programmed from the JTAG connector or the USB interface. JTAG connectors J2, J10 and J16 are to be used for troubleshooting only. The board default setup is with the FPGA JTAG pins connected to JTAG connector J16. The FPGA can be programmed using this connector if the MSEL inputs are set to the proper logic levels. These are set by solder jumpers SJP14-18. Consult the Altera data sheet for more information regarding JTAG programming. The FPGA also has the parallel programming inputs connected to the USB 3.0 controller. With SJP14-18 in teh default postions, this allows the FPGA to be programmed by the HSDC Pro software GUI. Every time the TSW14J56EVM is powered-down, the FPGA configuration is removed. The user must program the FPGA through the GUI after every time the board is powered-up. J2 can be used to program the USB controller U33. This device is programmed at power-up using the factory pre-programmed flash device U36. JTAG connector J10 is used to program the TI UCD90120A power monitor/sequencer device. This device is pre-programmed at the factory and this interface should only be used for troubleshooting.