SLWU086C November   2013  – January 2016 ADS42JB46 , ADS42JB49 , ADS42JB69 , DAC38J84

 

  1.   TSW14J56 JESD204B High-Speed Data Capture and Pattern Generator Card User's Guide
    1.     Trademarks
    2. 1 Functionality
      1. 1.1 ADC EVM Data Capture
      2. 1.2 DAC EVM Pattern Generator
    3. 2 Hardware Configuration
      1. 2.1 Power Connections
      2. 2.2 Switches, Jumpers, and LEDs
        1. 2.2.1 Switches and Pushbuttons
        2. 2.2.2 Jumpers
      3. 2.3 LEDs
        1. 2.3.1 Power and Configuration LEDs
        2. 2.3.2 Status LEDs
        3. 2.3.3 Connectors
          1. 2.3.3.1 SMA Connectors
          2. 2.3.3.2 FPGA Mezzanine Card (FMC) Connector
          3. 2.3.3.3 JTAG Connectors
          4. 2.3.3.4 USB I/O Connection
    4. 3 Software Start-Up
      1. 3.1 Installation Instructions
      2. 3.2 USB Interface and Drivers
    5. 4 Downloading Firmware
  2.   Revision History

2.3.3.4 USB I/O Connection

Control of the TSW14J56EVM is through USB 3.0 connector J9. This provides the interface between HSDC Pro GUI running on a PC Windows™ operating system and the FPGA. For the computer, the drivers needed to access the USB port are included on the HSDC Pro GUI installation software that can be downloaded from the web. The drivers are automatically installed during the installation process. On the TSW14J56EVM, the USB port is used to identify the type and serial number of the EVM under test, load the desired FPGA configuration file, capture data from ADC EVMs, and send test pattern data to the DAC EVMs.
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