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SLYA042 July 2024 FDC1004 , FDC1004-Q1

6.1 Calculating e_EXT for INA185A4 With 110Ω Input Resistors

Use the previous equations to perform an analysis on a hypothetical circuit with the INA185A4 with 110Ω resistors (R_EXT) at input pins. Consider the following circuit parameters:

Table 6-1 Required Device and Circuit Parameters To Calculate e_EXT

Parameter	Nominal Value	Tolerance	Drift (ppm/°C)
V_S	5V	0%	0
V_CM	12V	0%	0
T_{A, Max}	100°C	N/A	N/A
R_SH	1mΩ	0.1%	± 50ppm/°C
R_EXT	110Ω	0.1%	± 20ppm/°C
R_FB	500kΩ	Process Variation (PV) ± 20%	Process Variation Temperature Coefficient = ± 30ppm/°C
R_INT	2.5kΩ
R_BIAS	2.5kΩ
I_OS/2 Max	± 225nA	0	± 10
I_{B, CM ON}	58µA	20%	± 157ppm/°C
Gain_Device	200V/V	0.25%	± 8ppm/°C
Gain_{Total, Typical}	176.67844523V/V	Variable	Variable

Most of the fundamental circuit parameters needed are found in data sheet. However there is some calculation and estimation needed for I_OS and I_{B, CM ON}.

Typical I_OS is usually very small; however, this can increase for any ratio mismatch between the R_BIAS/2 resistors seen in Figure 2-1 and mismatch between the R_INT and R_FB resistors on the positive (non-inverting) and negative (inverting) branches of the internal amplifier network.

As stated previously, matching of resistors ratios is very small, but can be conservatively approximated by device's typical gain error of ±0.25%. Using this information, one can simulate the ideal amplifier network and measure maximum I_OS by setting all resistors in one branch to +0.25% and in the other branch set to -0.25%. For V_CM = 16V, I_OS is 450µA. Since all resistors will have the same drift, I_OS drift will be fairly low and simply approximated as 10ppm/°C. If a one-point calibration is performed, then error from I_OS will be negated. Please contact TI support for more information if necessary.

Figure 6-1 Worst-Case I_OS For Single-Stage CSA

For I_{B, CM ON}, the typical value is simply the jump in I_{B, CM} as shown in Figure 2-2. Tolerance can be approximated as process variation. Drift can be deduced by I_{B, CM} versus temperature data plots in data sheet. For the INA185, the data sheet shows a 2µA change in I_{B, CM} from -40°C to 125°C. Assume this value is 3µA and you can determine drift in ppm/°C as:

Equation 17.

I_{B, C M O N} D r i f t = \pm 10^{6} \times \frac{Δ I_{B, C M} \times 0.5}{Δ T_{A}} \times \frac{1}{I_{B, C M O N}}

Lastly temperature dependencies in V_S and especially V_CM need to be considered as these can add to the offset drift, which cannot be calibrated.

The calculated e_EXT values at 25° and maximum ambient temperature are shown in Table 6-2.

Offset Values are Referred-to-Shunt (RTS) Using Worst-Case GEF at 125°C

Table 6-2 Maximum Offset and Gain Errors and Drift for INA185A4 with 110Ω (0.1%, 20ppm/°C) Input Resistors at V_CM = 12V and V_REF=140mV

	T_A (°C)	High	Low
V_{OS, EXT Max} (µV)	25 °C	71.45	-71.25
V_{OS, EXT Max} (µV)	125 °C	115.82	-115.62
E_{G, EXT Max}	25 °C	1.99209%	-2.84638%
E_{G, EXT Max}	125 °C	2.04245%	-2.91539%
E_{G EXT, Drift} (ppm/°C)		5.057	-6.902
V_{OS EXT, Drift} (µV/°C)		0.442	-0.444
V_{OS, EXT Calibrated, 25°C} (µV)		44.37	-44.37

Note that worst-case V_{OS,
EXT} occurs when PV = -20%.

Table 6-3 shows offset values for both RTI and RTS along with the GEF used to convert them. The RTI values match the V_B measurement in simulation of the circuit as well shown in Figure 6-2.

Table 6-3 V_{OS, EXT Max} Value in Both RTI and RTS with GEF

	T_A	High	Low
V_{OS, EXT Max RTS}	25 °C	71.45	-71.25
V_{OS, EXT Max RTS}	125 °C	115.82	-115.62
V_{OS, EXT Max RTI}	25 °C	61.32	-71.25
V_{OS, EXT Max RTI}	125 °C	99.36	-99.21
GEF	25 °C	0.85832855	0.85840965
GEF	125 °C	0.85788132	0.85812512

Figure 6-2 Simulation of Example at 125°C

Figure 6-3 Total Error Comparisons with One-Point Offset Calibration at 25°C

6.1 Calculating eEXT for INA185A4 With 110Ω Input Resistors

6.1 Calculating e_EXT for INA185A4 With 110Ω Input Resistors