SNAA345 December   2020 LMK5C33216

 

  1.   Trademarks
  2. Introduction
  3. Wander Generation
    1. 2.1 Wander Generation MTIE Option 1, G.8262 EEC Option 1
    2. 2.2 Wander Generation TDEV G.8262 EEC Option 1
    3. 2.3 Wander Generation MTIE Stratum ITU-T G.8262 EEC Option 2
    4. 2.4 Wander Generation TDEV G.8262 EEC Option 2
  4. Wander Transfer
    1. 3.1 Transfer Function of the PLL for Option 1 and Option 2
    2. 3.2 Wander Transfer TDEV G.8262 Option 2
  5. Wander Tolerance
    1. 4.1 Wander Tolerance G.8262 Option 1
    2. 4.2 Wander Tolerance G.8262 Option 2
  6. Jitter Tolerance
    1. 5.1 Jitter Tolerance G.8262 Option 1 and Option 2
  7. Phase Transient Generation
    1. 6.1 Short-Term Phase Transient Response G.8262 Option 1
    2. 6.2 Short-Term Phase Transient Response G.8262 Option 2
    3. 6.3 Phase Transient Generation With Signal Interruptions G.8262 EEC Option 1
    4. 6.4 Phase Discontinuity G.8262 Option 1
    5. 6.5 Phase Discontinuity G.8262 Option 2
  8. Holdover
    1. 7.1 Holdover G.8262 Option 1
    2. 7.2 Holdover G.8262 Option 2
  9. Free-Run Accuracy
    1. 8.1 Free-Run Accuracy G.8262 Option 1 and Option 2
  10. Pull-In and Hold-In
    1. 9.1 Pull-In Range G.8262 Option 1 and Option 2
  11. 10Conclusion
  12. 11References

Phase Transient Generation With Signal Interruptions G.8262 EEC Option 1

The passing condition for this specification is that an input interruption that does not force a switchover does not cause an output phase transient greater than 120 ns with a maximum frequency offset of 7.5 ppm in a period of 16 ms. For this setup, a pulse generator was inserted into the general setup as in Figure 6-4. An 8110A pulse generator is used to generate a gapped clock and was set to generate 25 MHz with 1 pulse missing every 2048 clock cycles. This gapped clock was used as reference to LMK5C33216 and the LMK5C33216 output was monitored for phase transients.

The LMK5C33216 passed the requirements for the phase transient generation with signal interruptions G.8262 EEC Option 1. There were no significant phase hits (meets compliance requirements) during operation of the device while receiving a gapped clock as reference.

GUID-20201216-CA0I-QFQV-W2FM-RWNP2BFSKLD9-low.svgFigure 6-4 Test Setup for Phase Transient Generation With Signal Interruption
GUID-20201216-CA0I-RSNB-R35M-DCMRGXZT0D8K-low.svgFigure 6-5 Phase Transient With Signal Interruptions Results