SNAA345 December   2020 LMK5C33216

 

  1.   Trademarks
  2. 1 Introduction
  3. 2 Wander Generation
    1. 2.1 Wander Generation MTIE Option 1, G.8262 EEC Option 1
    2. 2.2 Wander Generation TDEV G.8262 EEC Option 1
    3. 2.3 Wander Generation MTIE Stratum ITU-T G.8262 EEC Option 2
    4. 2.4 Wander Generation TDEV G.8262 EEC Option 2
  4. 3 Wander Transfer
    1. 3.1 Transfer Function of the PLL for Option 1 and Option 2
    2. 3.2 Wander Transfer TDEV G.8262 Option 2
  5. 4 Wander Tolerance
    1. 4.1 Wander Tolerance G.8262 Option 1
    2. 4.2 Wander Tolerance G.8262 Option 2
  6. 5 Jitter Tolerance
    1. 5.1 Jitter Tolerance G.8262 Option 1 and Option 2
  7. 6 Phase Transient Generation
    1. 6.1 Short-Term Phase Transient Response G.8262 Option 1
    2. 6.2 Short-Term Phase Transient Response G.8262 Option 2
    3. 6.3 Phase Transient Generation With Signal Interruptions G.8262 EEC Option 1
    4. 6.4 Phase Discontinuity G.8262 Option 1
    5. 6.5 Phase Discontinuity G.8262 Option 2
  8. 7 Holdover
    1. 7.1 Holdover G.8262 Option 1
    2. 7.2 Holdover G.8262 Option 2
  9. 8 Free-Run Accuracy
    1. 8.1 Free-Run Accuracy G.8262 Option 1 and Option 2
  10. 9 Pull-In and Hold-In
    1. 9.1 Pull-In Range G.8262 Option 1 and Option 2
  11. 10Conclusion
  12. 11References

9.1 Pull-In Range G.8262 Option 1 and Option 2

To meet this requirement, a PLL which is in free-run or holdover within its ±4.6 ppm frequency range (based on its TCXO/OCXO) must be able to pull-in to a reference that is within ±4.6 ppm frequency (traceable to Stratum-1). In other words, the PLL should be able to pull-in a minimum of ±9.2 ppm and no alarms should be asserted during this process. Hold-in range is defined as the largest offset between the reference frequency of a slave clock and a specified nominal frequency, within which the slave clock maintains lock as the frequency varies over the frequency range. The hold-in range for EEC-Option 2 should be ±4.6 ppm, whatever the internal oscillator frequency offset may be. The minimum pull-in range for Option 1 and Option 2 should be ±4.6 ppm, whatever the internal oscillator frequency offset may be.

The LMK5C33216 meets the specification for pull-in and hold-in range as shown in Table 9-1 and Table 9-2.

Table 9-1 Pull-In Results
REFERENCE TO DPLLTCXOOUTPUTNOTES
25 MHz - 4.6 ppm10 MHz + 4.6 ppm10 MHz - 4.6 ppmLock from POR with FASTLOCK Enabled
25 MHz - 4.6 ppm10 MHz - 4.6 ppm10 MHz - 4.6 ppm
25 MHz + 4.6 ppm10 MHz + 4.6 ppm10 MHz + 4.6 ppm
25 MHz + 4.6 ppm10 MHz - 4.6 ppm10 MHz + 4.6 ppm
Table 9-2 Hold-In Results
REFERENCE TO DPLLTCXOOUTPUTNOTES
25 MHz - 4.6 ppm10 MHz ± 4.6 ppm10 MHz - 4.6 ppm'±' here refers to reference frequency (TCXO or Reference to DPLL) being swept from '-' to '+' and vice-versa
25 MHz + 4.6 ppm10 MHz ± 4.6 ppm10 MHz + 4.6 ppm
25 MHz ± 4.6 ppm10 MHz - 4.6 ppm10 MHz ± 4.6 ppm
25 MHz ± 4.6 ppm10 MHz + 4.6 ppm10 MHz ± 4.6 ppm
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