The Address Decoder generates the memory selects for Flash, ROM and RAM arrays. The memory map addresses are selectable through configurable register settings for low and high boundaries. These fine memory selects can be configured from 1K to 16M sizes. Power on reset uses the default addresses in the memory map for ROM execution, which is then configured by the ROM code to the application setup. During access to the DEC registers, a wait state is asserted to the CPU. DEC registers are only writable in the Privilege mode for user mode protection.

The DEC Address Manager controls memory mapping and flash programming. All memory mapping activity is normally done by the boot ROM. This is described in this document. This information is only useful if there is some need to return to ROM mode without going through a reset first.

There may be a need for customer programs to erase and program both Program and Data Flash, so this is discussed in some detail.