SNIU028D February 2016 – September 2020 UCD3138 , UCD3138064 , UCD3138064A , UCD3138128 , UCD3138A , UCD3138A64
Here is a diagram of the next section of the filter:
The S0.23 notation means a 24 bit number with 1 sign bits to the left of the binary point and 23 bits to the right of the point, meaning a range from 1 - 2-23 to -1. 2.23 means a number with 1 sign bit and 2 magnitude bits to the left of the binary point, and 23 magnitude bits to the right.
This section of the filter adds the P, I, and D outputs together, giving a potential 26 bit result. Saturation logic clamps this back down to 24 bits. If the value is above the maximum value for 24 bits, the output of the saturation logic will be set to the maximum (0x7fffff or 8388607) Negative values out of range will be clamped to the most negative value.
The output of the saturation section goes to a programmable shifter which can be programmed for 8 different shifts, including no shift at all. This can be used to compensate for the scaling of the filter coefficients.
After the scaling, there is a clamp with independent clamp high and clamp low values which are set by writing to registers. This clamp also has status bits which are set when the clamp limits are exceeded.
Note however, that there is no saturation unit at this point. Bits over 24 are simply truncated and ignored. If the shifter is set to shift by 0, or to shift to the right, all input numbers will give the expected result. If a left shift is used, the programmer must make sure that the result will always fit within 24 bits, or results may be unexpected.