6.3 Capacitance Used in Loop Filter

On the 953, there are two pins labeled LPF1 (9) and LPF2 (12), these are filter capacitors for two of the PLLs within the DS90UB953-Q1. LPF1 should have a 0.022-µF capacitor connected to the VDD_PLL pin (pin 11). The capacitor connected between LPF1 and VDDPLL should enclose as small of a loop as possible. LPF2 should have a 0.1-μF capacitor connecting the pin to GND. One of these PLLs generates the high-speed clock that is used for the serialization of the output, and the other is used for the PLL used in the CSI-2 receive port.

Noise coupled into these pins will degrade the performance of the PLLs in the DS90UB953-Q1, so the caps must be placed close to the pins that they are connected to, and the area of the loop enclosed must be minimized. Pin 10 is a bypass capacitor pin for the internal regulator for the PLL. The bypass capacitor can be mounted on the other side of the board so that the LPF1 capacitor can be placed very close to pins 9 and 11 with short connections.