SNLA411 October 2022 DP83TC812R-Q1 , DP83TC812S-Q1 , DP83TC813R-Q1 , DP83TC813S-Q1
The following pins are used by the DP83TC812/3 for TC10 functionality
Pin No. | Name | Type | Function |
---|---|---|---|
7 (DP83TC812) 15 (DP83TC813) |
VSLEEP | Supply | 3.3 V power supply input derived from VBAT |
8 (DP83TC812) 16 (DP83TC813) |
WAKE | I/O |
Bidirectional I/O pin used for
|
10 (DP83TC812) 17 (DP83TC813) |
INH | Output |
Indication Output for Sleep Mode
|
The VSLEEP pin needs a 3.3 V power supply input. The supply is derived from a low power LDO directly from VBAT (usually 12 V to 48 V). During sleep mode, to have the lowest power consumption, it is recommended that the VSLEEP is only supply which is on.
The following table shows the characteristics of this power supply pin.
S.No. | Parameter | Description | Units | Min | Typ | Max |
---|---|---|---|---|---|---|
1 | VSLEEP Voltage | Supply voltage operation limits | V | 2.97 | 3.3 | 3.63 |
2 | VSLEEP Ramp time | Ramp time (0-100%) of the supply | ms | Refer to Data Sheet | ||
3 | Current consumption – Sleep mode | Current consumption from VSLEEP in sleep mode (INH = 0) | µA | 7 | 18 | |
4 | Current consumption – Functional mode | Current consumption from VSLEEP in functional mode (INH = 1) | mA | 4 |
The following image shows the recommended de-coupling network for the VSLEEP supply
WAKE is a bidirectional input pin used for local wake as input and wake forwarding as output. This pin can be controlled by the MAC/controller for local wake. Open drain (high polarity) is recommended from the MAC/controller.
A pulse of width >40 μs on this pin wakes up the PHY. For wake-forwarding, the pin drives the pin high for some time and transitions back to input mode emulating open drain drive.
Since the pin uses open drain configuration, a strong external pull down resistance (10 kΩ) can be used.
The following table shows the requirements of the WAKE pin
S.No. | Parameter | Description | Units | Min | Typ | Max |
---|---|---|---|---|---|---|
1 | VIH | Minimum voltage beyond which the input buffer detects high | V | 2 | ||
2 | VIL | Minimum voltage below which the input buffer detects low | V | 0.8 | ||
3 | R pull-down | Pull-down resistance on the pin internal to the PHY | kΩ | 455 | ||
4 | VOH | Output high voltage (@ I = 2 mA) | V | 2.4 |
INH is an open drain (high polarity) output pin which indicates whether the device is in sleep mode.
When the device is in sleep mode, the driver is turned off (Hi-Z). A pull down resistance external to the PHY can be used (10 kΩ recommended) which pulls down the INH pin down to 0 V.
When the device is out of sleep, INH transitions to high.
S.No. | Parameter | Description | Units | Min | Typ | Max |
---|---|---|---|---|---|---|
1 | VOH | Output Voltage (@ I = 2 mA) | V | 2.4 |