SNLA426 june 2023 DS320PR1601 , DS320PR410
The PCB material plays a large role in achieving optimum signal integrity. Table 9-1 shows insertion loss – SDD21 – of 1 inch of different board materials using different dielectric constants and loss tangents. Loss tangent (Df) or Dissipation Factor is a measure of signal attenuation as a signal propagates through a transmission line. This attenuation is due to the electromagnetic wave absorption in the dielectric material and is referred to as dielectric loss. As frequency increases, the dielectric loss also increases proportionally.
Common material choices for high-speed signal layers are Panasonic Megtron 6, Roger, and GETEK. TI has successfully utilized Panasonic Megtron 6 for a variety of high-speed board designs.
| Material Name | εr (Dielectric Constant) | Df (Loss Tangent) | 1” SDD21 at 8GHz(dB) | 1” SDD21 at 16GHz(dB) |
|---|---|---|---|---|
| Megtron 6 | 3.4 | 0.002 | 0.189 | 0.336 |
| Roger | 3.48 | 0.0037 | 0.251 | 0.411 |
| GETEK | 4.1 | 0.011 | 0.548 | 1.017 |
| Nelco 4000-6 | 4.0 | 0.012 | 0.578 | 1.078 |
| FR4 | 4.4 | 0.014 | 0.686 | 1.289 |
| Tetra Functional FR4 | 4.1 | 0.022 | 0.961 | 1.844 |
Total insertion loss is calculated as follows:
Note: Zo is designed to equal 85 Ω differential impedance, given this is the requirement for PCIe add-in-card applications.
PCB loss is a fraction of the total channel loss; additional loss due to the device package, vias, connectors, and so on and also have to be considered. When there are multiple vias, reference plane changes, and connectors, the channel frequency response becomes complex. Each time the signal travels through a via, connector, or hits a package with similar parasitic, these affect signal reflections and loss differently. A complex multi-tap DFE must be utilized to track these changes and equalize the signal correctly. To summarize, it is best to minimize the number of vias, connectors, and optimize landing pads of the ASIC.
For high speed PCB layout design, low loss material such as Megtron 6 is used on just the top and bottom layers – where high-speed signals are routed. Please note, other than cost, using low loss materials typically causes a longer PCB fabrication time. Additionally, it can take a longer amount time to acquire lower loss PCB materials since these might not be widely used.