5 Programming Examples

In the examples below, assume that SMBus secondary address 0x18 is used for Device 0 (Channels 0-3) and SMBus secondary address 0x1A is used for Device 1 (Channels 0-3). Example code using TotalPhase Aardvark I2C controller.

• PD control through register programming
  • Broadcast write to Device 0 and Device 1 Bank 0 registers at Channel register 0x85 (Channel base register 0x80 + PD Override register 0ffset 0x05) with a value of 0x80 to power down all channels.
    • <i2c_write addr="0x18" count="0" radix"16">85 80</i2c_write>
    • <i2c_write addr="0x1A" count="0" radix"16">85 80</i2c_write>
  • Broadcast write to Device 0 and Device 1 Bank 0 registers at Channel register 0x85 (Channel base register 0x80 + PD Override register 0ffset 0x05) with a value of 0x7F to power on all channels.
    • <i2c_write addr="0x18" count="0" radix"16">85 7F</i2c_write>
    • <i2c_write addr="0x1A" count="0" radix"16">85 7F</i2c_write>
• Broadcast Channel CTLE Index/Flat Gain Selection through register programming (CTLE Index 2, FlatGain 0dB)

  To select CTLE Index 2 with Flat Gain of 0 dB on all channels:

  • Broadcast write to Device 0 and Device 1 Bank 0 registers at Channel register 0x81 (Channel base register 0x80 + EQ Control register 0ffset 0x01) with a value of 0x98.
  • Broadcast write to Device 0 and Device 1 Bank 0 registers at Channel register 0x83 (Channel base register 0x80 + EQ/Gain Control register 0ffset 0x03) with a value of 0x05
    • <i2c_write addr="0x18" count="0" radix"16">81 98</i2c_write>
    • <i2c_write addr="0x18" count="0" radix"16">83 05</i2c_write>
    • <i2c_write addr="0x1A" count="0" radix"16">81 98</i2c_write>
    • <i2c_write addr="0x1A" count="0" radix"16">83 05</i2c_write>
• Individual Channel CTLE Index / Flat Gain Selection via register programming (CTLE Index 2, FlatGain 0dB)

  To select CTLE Index 2 with Flat Gain of 0 dB on a single channel (Channel 0):

  • Write to Channel 0 register on Device 0 Bank 0 and Device 1 Bank 0 registers at Channel register 0x01 (Channel 0 base register 0x00 + EQ Control register 0ffset 0x01) with a value of 0x98.
  • Write to Channel 0 register on Device 0 Bank 0 and Device 1 Bank 0 registers at Channel register 0x03 (Channel 0 base register 0x00 + EQ/Gain Control register 0ffset 0x03) with a value of 0x05
    • <i2c_write addr="0x18" count="0" radix"16">01 98</i2c_write>
    • <i2c_write addr="0x18" count="0" radix"16">03 05</i2c_write>
    • <i2c_write addr="0x1A" count="0" radix"16">01 98</i2c_write>
    • <i2c_write addr="0x1A" count="0" radix"16">03 05</i2c_write>