SNOA943 January 2016 FDC2112 , FDC2112-Q1 , FDC2114 , FDC2114-Q1 , FDC2212 , FDC2212-Q1 , FDC2214 , FDC2214-Q1
The FDC2x1x devices utilize an LC tank architecture to determine the change in capacitance by measuring (sampling) the change in oscillation frequency of the tank. The tank oscillation frequency (fOSC) is compared to an independent reference clock (fREF) to produce an output sample that represents fOSC as a fraction of fREF. The power consumption of the FDC2x1x devices is typically on the order of a few milliamps for continuous sampling modes. For low power applications, duty-cycling the FDC2x1x using sleep mode is a technique that can be used to reduce the power consumption. When the FDC2x1x can sample much faster than the application requires, the device can be put into a lower power sleep mode while it is not in the data conversion process. The device is only active when it is performing a measurement conversion to minimize the total amount of current flowing through the device and therefore reduce overall power consumption.
One of the main tradeoffs associated with this duty-cycling technique is responsiveness. The higher the sampling rate, the faster the system responsiveness is, but at the cost of higher average power. However, for applications that do not need an extraordinarily fast response time, a lower sampling rate can be used to achieve lower power consumption. For example, many human-machine interfaces (HMI) only need to run at sampling rates of 40 SPS or lower. The total conversion time of a measurement for a given sampling rate can also affect power consumption depending on the resolution requirements. This concept corresponds to the duty cycle of the device at a particular sampling rate.