SNOAA62B February   2023  – October 2024 LMP7704-SP

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Overview
  5. 2SEE Mechanisms
  6. 3Test Device and Test Board Information
  7. 4Irradiation Facility and Setup
  8. 5SEL Results
  9. 6SET Results
  10. 7Extended Characterization
    1. 7.1 Correlation Test Results
    2. 7.2 Root Cause
    3. 7.3 SEL Prevention
  11. 8Summary
  12.   A Confidence Interval Calculations
  13.   B References
  14.   C Revision History

Root Cause

The LMP7704-SP employs an ESD clamping structure to protect against ESD damage during storage, transit, and assembly. If the supply pins are floating and a high potential (such as an ESD event) manifests across them, the structure activates and breaks down to provide a low-impedance path between the supplies. Once the potential between the supplies has equalized and the discharge event is over, the structure becomes electrically high-impedance again.

This structure can be unintentionally and momentarily turned on if struck by an energetic particle, such as a heavy ion. The clamp is activated and a low-impedance path between VCC and VEE results. This path effectively establishes a momentary short across any decoupling capacitance at the pins, causing a localized high instantaneous current as the capacitor charge bucket is drained. The magnitude of this current follows the form below:

Equation 2. I(t)=CdV(t)dt

An increase in the capacitance (C), supply voltage (V), or both leads to a corresponding increase in peak current (I). Series resistance and inductance between the supply pins and the decoupling capacitor, whether intended or deliberate, reduce the peak current flow. Capacitor ESR also plays a role in the response. For bipolar configurations with split supplies and decoupling capacitors between each supply and ground, the decoupling capacitors manifest in series.

If the peak current is not high enough to damage the device, then the clamp turns off once the voltage across the effective capacitance has drained and reached approximately two diode drops. By this time, the system power supply begins to recharge the decoupling capacitors back to the supply voltage, causing the device power supply to ramp back up. Transients at the device outputs can occur while the power supply is below the recommended minimum value (2.7V) or as the supply ramps back to the original value, especially if the nominal output voltage exceeds the supply voltage.

LMP7704-SP Supply and Output Voltages
                        During SETFigure 7-3 Supply and Output Voltages During SET
LMP7704-SP Supply and Output Voltages
                        During SETFigure 7-4 Supply and Output Voltages During SET

If the peak current is sufficiently high, localized heating can damage the ESD clamp. This damage in turn can cause the low-impedance path between the supply pins to persist, resulting in electrical and thermal overstress and part failure. Preventative measures include shielding and applications-level fixes, as discussed in subsequent sections.

Any relationship between ion energy and event incidence has not yet been explored in detail. Experiments were mostly performed around 75MeV-cm2/mg. A test at 18.9MeV-cm2/mg showed the structure was still able to be activated, though at a far lower rate (upsets per minute) than observed at the higher energy level. Back-to-back events can occur, especially at higher energy levels. Studies focused on bipolar supply conditions with input and output voltages near midsupply; note that some specifics of the response vary depending on circuit architecture.

LMP7704-SP Back-to-back SETsFigure 7-5 Back-to-back SETs