8.3.1 Direct-Drive GaN Architecture

The LMG341xR050 utilizes a series FET to ensure the GaN module stays off when V_DD is not applied. When this FET is off, the gate of the GaN transistor is held within a volt of the FET's SOURCE pin. As the DRAIN pin voltage increases, silicon FET blocks the drain voltage, and the V_GS of the GaN transistor decreases until it passes its threshold voltage. Then, the GaN transistor turns off and blocks the remaining drain voltage.

When the LMG341xR050 is powered up, the internal buck-boost converter generates a negative voltage (V_NEG) that is sufficient to directly turn off the GaN transistor. In this case, the silicon FET is held on and the GaN transistor is switched with gate at VNEG to turn off and at SOURCE pin voltage to turn on. During operation, this removes the switching loss of silicon FET.