SNVA966 July 2020 – MONTH LP8864-Q1 , LP8864S-Q1 , LP8866-Q1 , LP8866S-Q1
If during LP886XX-Q1 device operation VDD falls below VDDUVLO falling level, boost, power-line FET, and LED outputs are turned off, and the device enters STANDBY mode. The VDDUVLO_STATUS fault bit will be set in the SUPPLY_FAULT_STATUS register, and the INT pin will be triggered. The LP886XX-Q1 recovers automatically to ACTIVE mode when VDD rises above VDDUVLO rising threshold.