米6体育平台手机版

SNVA966 July 2020 – MONTH LP8864-Q1 , LP8864S-Q1 , LP8866-Q1 , LP8866S-Q1

Trademarks
1Fault Handling Routine
2Different Fault and Diagnostic Handling Method Recommendation
1. 2.1 Different Fault Handling Method
2. 2.2 Different Diagnostic Wrong Information Handling Method
  1. 2.2.1 System-Level Critical Wrong Diagnostic Information
  2. 2.2.2 System Level Sustainable Wrong Diagnostic Information
3Summary
A Fault-Related Functions
1. A.1 Protection and Fault Detections
  1. A.1.1 Supply Faults
    1. A.1.1.1 VIN Undervoltage Faults (VINUVLO)
    2. 16
    3. A.1.1.2 VIN Overvoltage Faults (VINOVP)
    4. A.1.1.3 VDD Undervoltage Faults (VDDUVLO)
    5. A.1.1.4 VIN OCP Faults (VINOCP)
    6. A.1.1.5 Charge Pump Faults (CPCAP, CP)
    7. A.1.1.6 Boost Sync Clock Invalid Faults (BSTSYNC)
    8. A.1.1.7 CRC Error Faults (CRCERR)
  2. A.1.2 Boost Faults
  3. A.1.3 LED Faults
    1. A.1.3.1 Open LED Faults (OPEN_LED)
    2. A.1.3.2 Short LED Faults (SHORT_LED)
    3. A.1.3.3 LED Short to GND Faults (GND_LED)
    4. A.1.3.4 Invalid LED String Faults (INVSTRING)
    5. A.1.3.5 I2C Timeout Faults
  4. A.1.4 Overview of the Fault and Protection Schemes
2. A.2 Programming Examples
  1. A.2.1 Clearing Fault Interrupts
  2. A.2.2 Disabling Fault Interrupts
  3. A.2.3 Diagnostic Registers

The following equation is used to calculate the UVLO threshold for VIN rising edge:

Equation 1.

where

VIN_{UVLO_TH} = 0.787 V

The hysteresis of UVLO threshold can be designed and calculated with the following equation.

Equation 2.

where

I_UVLO = 5 µA

So the following equation can be used for UVLO threshold for VIN falling edge:

Equation 3.

The bottom resistors, R₅ of voltage divider is able to be disconnected to the GND through an additional external N-type of FET as Figure 4-2. This design is to minimize the current leakage from VIN in shutdown mode to extend the battery life.

Figure 4-2 V_IN UVLO Setting Circuit Without Current Leakage Path