SNVK008 April 2024 TPS7H4011-SP
| PARAMETER | TEST CONDITIONS | SUB-GROUP | MIN | TYP | MAX | UNIT | TEST NUMBERS | ||
|---|---|---|---|---|---|---|---|---|---|
| POWER SUPPLIES AND CURRENTS | |||||||||
| VUVLOR_PVIN | PVIN internal UVLO rising threshold | 1, 2, 3 | 3.2 | 3.4 | 3.6 | V | 14.1,14.7, 14.13, 14.19 | ||
| VUVLOHYST_PVIN | PVIN internal UVLO hysteresis | 1, 2, 3 | 425 | 450 | 500 | mV | 4.3, 14.9, 14.15, 14.21 | ||
| VUVLOR_VIN | VIN internal UVLO rising threshold | 1, 2, 3 | 3.4 | 3.6 | 3.8 | V | 14.4, 14.10, 14.16, 14.22 | ||
| VUVLOHYST_VIN | VIN internal UVLO hysteresis | 1, 2, 3 | 140 | 155 | 170 | mV | 14.6, 14.12, 14.18, 14.24 | ||
| ISHDN_VIN | VIN shutdown supply current | VEN = 0V | VIN = 4.5V | 1, 2, 3 | 2 | 2.9 | mA | 12.1 | |
| VIN = 14V | 1, 2, 3 | 2 | 3 | 12.16 | |||||
| ISHDN_PVIN | PVIN shutdown supply current | VEN = 0V | PVIN = 4.5V | 1, 2, 3 | 2.6 | 3.5 | mA | 12.2 | |
| PVIN = 14V | 1, 2, 3 | 3.5 | 4.7 | 12.17 | |||||
| IQ_VIN | VIN operating quiescent current (non switching) | VEN = 7V, VSENSE = 1V (3) | 1, 2, 3 | 2.6 | 5 | mA | 12.3, 12.8, 12.13, 12.18 | ||
| ENABLE AND FAULT | |||||||||
| VEN(rising) | Enable rising threshold (turn-on) | 1, 2, 3 | 0.555 | 0.61 | 0.655 | V | 15.3, 15.6, 15.9, 15.12 | ||
| VEN(falling) | Enable falling threshold (turn-off) | 1, 2, 3 | 0.46 | 0.51 | 0.554 | 15.4, 15.7, 15.10, 15.13 | |||
| tEN(delay) | Enable propogation delay | EN high to SW high, CSS = 22nF | 1, 2, 3 | 52 | 100 | µs | 24.32, 24.72, 24.112, 24.152 | ||
| IEN(LKG) | Enable input leakage current | VEN = 7V | 1, 2, 3 | 2 | 25 | nA | 15.1, 15.15 | ||
| VFAULT(rising) | FAULT threshold rising (turn-off) | 1, 2, 3 | 0.57 | 0.6 | 0.65 | V | 16.1, 16.5, 16.9, 16.13 | ||
| VFAULT(falling) | FAULT threshold falling (turn-on) | 1, 2, 3 | 0.47 | 0.5 | 0.55 | 16.2,16.6, 16.10, 16.14 | |||
| VFAULT(HYS) | FAULT hysteresis voltage | 1, 2, 3 | 90 | 100 | 110 | mV | 16.3, 16.7, 16.11, 16.15 | ||
| IFAULT(LKG) | Fault input leakage current | VFAULT = 7V | 1, 2, 3 | 3 | 5 | µA | 16.4, 16.8, 16.12, 16.16 | ||
| tFAULT(min) | FAULT minimum pulse width | see FAULT Minimum Pulse and Delay Duration | 9, 10, 11 | 0.4 | 1.4 | µs | 24.39, 24.79, 24.119, 24.159 | ||
| tFAULT(delay) | FAULT delay duration | see FAULT Minimum Pulse and Delay Duration | 9, 10, 11 | 26 | 31 | 44 | (1/fsw) s | 24.34, 24.36, 24.38,24.74, 24.76, 24.78, 24.114, 24.116, 24.118,24.154, 24.156, 24.158 | |
| VOLTAGE REFERENCE AND REMOTE SENSE | |||||||||
| VREF | Internal voltage reference (including error amplifier VIO) | see Reference Voltage Measurement | TA = –55℃ | 3 | 0.596 | 0.599 | 0.603 | V | |
| TA = 25℃ | 1 | 0.597 | 0.6 | 0.603 | 17.3,17.11, 17.19, 17.27 | ||||
| TA = 125℃ | 2 | 0.596 | 0.599 | 0.603 | |||||
| VREF(internal) | Internal voltage reference (without error amplifier included) | VREF(internal) = VSS_TR – VSNS- | 1, 2, 3 | 0.594 | 0.6 | 0.606 | V | 17.1, 17.9, 17.17, 17.25 | |
| VBG | Bandgap voltage (voltage at the REFCAP pin) | CREFCAP = 470nF | 1, 2, 3 | 1.182 | 1.2 | 1.218 | V | 12.5,12.10, 12.15, 12.20 | |
| IVSNS+(LKG) | VSNS+ input leakage current | VSNS+ = 0.6V | 1, 2, 3 | 10 | 30 | nA | 17.5, 17.13, 17.21, 17.29 | ||
| IVSNS- | VSNS- output current | 1, 2, 3 | 8 | 10 | 12 | µA | 17.4,17.12, 17.20,17.28 | ||
| ERROR AMPLIFIER | |||||||||
| VIO | Error amplifier input offset voltage | VSENSE = 0.6V | 1, 2, 3 | –2.3 | 2.9 | mV | 17.2, 17.10, 17.18, 17.26 | ||
| gmEA | Error amplifier transconductance | –10μA < ICOMP < 10μA, VCOMP = 1V | 9, 10, 11 | 1000 | 1600 | 2300 | µS | 18.1,18.4, 18.7, 18.10 | |
| EADC | Error amplifier DC gain | VSENSE = 0.6V | 11500 | V/V | |||||
| EAISRC | Error amplifier source | VCOMP = 1V, 100mV input overdrive | 1, 2, 3 | 70 | 125 | 180 | µA | 18.2,18.5, 18.8, 18.11 | |
| EAISNK | Error amplifier sink | 70 | 125 | 180 | 18.3, 18.6, 18.9, 18.12 | ||||
| EARo | Error amplifier output resistance | 7 | MΩ | ||||||
| EABW | Error amplifier bandwidth | 9 | MHz | ||||||
| gmps | Power stage transconductance, 18.3A (typ) current limit | IOUT = 12A, ILIM = AVDD | TA = –55℃ | 3 | 14.4 | 19.4 | 24.8 | S | |
| TA = 25℃ | 1 | 15.2 | 20.4 | 26.1 | 20.12, 20.46, 20.80, 20.114 | ||||
| TA = 125℃ | 2 | 16 | 21 | 27 | |||||
| gmps | Power stage transconductance, 13.4A (typ) current limit | IOUT = 9A, RILIM_TOP = 49.9kΩ, RILIM_BOT = 100kΩ | TA = –55℃ | 3 | 9.3 | 13.3 | 16.3 | S | |
| TA = 25℃ | 1 | 9.6 | 13.8 | 17.5 | 20.13, 20.47, 20.81, 20.115 | ||||
| TA = 125℃ | 2 | 10.6 | 14 | 18.1 | |||||
| gmps | Power stage transconductance, 18.3A (typ) current limit | VCOMP = 0.6V, ILIM = AVDD | 1, 2, 3 | 18 | 22.9 | 28.3 | S | 20.18, 20.52,20.86, 20.120 | |
| gmps | Power stage transconductance, 13.4A (typ) current limit | VCOMP = 0.65V, RILIM_TOP = 49.9kΩ, RILIM_BOT = 100kΩ | 1, 2, 3 | 13 | 16.3 | 20.6 | S | 20.19, 20.53,20.87, 20.121 | |
| gmps | Power stage transconductance, 9A (typ) current limit | VCOMP = 0.7V, RILIM_TOP = 100kΩ, RILIM_BOT = 49.9kΩ | 1, 2, 3 | 8 | 11 | 14 | S | 20.20, 20.54, 20.88, 20.122 | |
| gmps | Power stage transconductance, 5.6A (typ) current limit | VCOMP = 0.75V, ILIM = GND | 1, 2, 3 | 4.6 | 7.2 | 9.2 | S | 20.21, 20.55, 20.89, 20.123 | |
| OVERCURRENT PROTECTION | |||||||||
| IOC_HS1 | High-side switch
current limit threshold 1 | RSHORT = 100mΩ | ILIM = GND | 1, 2, 3 | 4.3 | 5.6 | 6.5 | A | |
| ILIM = GND, post TID = 100krad(Si) | 1 | 3.7 | 4.8 | 6.5 | 20.4, 20.38, 20.72, 20.106 | ||||
| RILIM_T = 100kΩ, RILIM_B = 49.9kΩ | 1, 2, 3 | 7.2 | 9 | 10.6 | 20.5,20.39, 20.73, 20.107 | ||||
| RILIM_T = 49.9kΩ, RILIM_B = 100kΩ | 1, 2, 3 | 11.2 | 13.4 | 16 | 20.6,20.40, 20.74, 20.108 | ||||
| ILIM = AVDD | 1, 2, 3 | 15.8 | 18.3 | 21.8 | 20.7,20.41, 20.75,20.109 | ||||
| IOC_HS2 | High-side switch current limit threshold 2 | VIN = 12V, RSHORT ≈ 4mΩ | ILIM = GND | 1, 2, 3 | 5 | 6.6 | 8.1 | A | 20.8,20.42, 20.76, 20.110 |
| RILIM_T = 100kΩ, RILIM_B = 49.9kΩ | 1, 2, 3 | 9.1 | 11.1 | 13.2 | 20.9 20.43, 20.77, 20.111 | ||||
| RILIM_T = 49.9kΩ, RILIM_B = 100kΩ | 1, 2, 3 | 14.1 | 17 | 20.2 | 20.10 20.44,20.78,20.112 20.11, 20.45, 20.79,20.113 | ||||
| ILIM = AVDD | 1, 2, 3 | 19.1 | 23.9 | 28.2 | |||||
| IOC_LS(sink) | Low-side switch sinking overcurrent threshold | TA = –55°C | 3 | 1.6 | 2.3 | 3.1 | A | ||
| TA = 25°C | 1 | 1.5 | 2.2 | 2.8 | 19.2,19.5, 19.8, 19.11 | ||||
| TA = 125°C | 2 | 1.4 | 2 | 2.4 | |||||
| IILIM(lkg) | ILIM input leakage current | ILIM = 7V | 1, 2, 3 | 2 | 25 | nA | 15.2,15.16 | ||
| COMPSHDN | COMP shutdown voltage | 1, 2, 3 | 1.7 | 1.9 | 2.1 | V | 22.1,22.7, 22.13,22.19 | ||
| tCOMP(delay) | COMP shutdown delay | 30 | µs | ||||||
| SOFT START AND TRACKING | |||||||||
| tSS | Soft start time | VSS_TR from 10% to 90%, VSNS- = GND, VOUT(set) = 3.3V | CSS = 5.6nF | 9, 10, 11 | 1.5 | ms | 22.4,22.10, 22.16,22.22 | ||
| CSS = 22nF | 9, 10, 11 | 4.7 | 5.8 | 7.3 | 22.5,22.11, 22.17,22.23 | ||||
| CSS = 100nF | 9, 10, 11 | 24.7 | 22.6,22.12, 22.18,22.24 | ||||||
| RSS(discharge) | Soft start discharge pull-down resistor | 1, 2, 3 | 200 | 442 | 700 | Ω | 22.2,22.8, 22.14,22.20 | ||
| SSstartup | Maximum voltage on SS before startup (5) | 1 | 20 | mV | 22.3,22.9, 22.15,22.21 | ||||
| SLOPE COMPENSATION | |||||||||
| SC | Slope compensation with 18.3A (typ) current limit | fSW = 100kHz, ILIM = AVDD | RSC = 1.1MΩ | –0.7 | A/µs | ||||
| fSW = 500kHz, ILIM = AVDD | RSC = 80.6kΩ | –8.8 | |||||||
| RSC = 196kΩ | –4.2 | ||||||||
| RSC = 1.1MΩ | –1.2 | ||||||||
| fSW = 1000kHz, ILIM = AVDD | RSC = 80.6kΩ | –10.5 | |||||||
| RSC = 196kΩ | –5.1 | ||||||||
| RSC = 1.1MΩ | –2.1 | ||||||||
| Slope compensation with 13.4A (typ) current limit | fSW = 500kHz, RILIM_TOP = 49.9kΩ, RILIM_BOT = 100kΩ | RSC = 196kΩ | –3.2 | A/µs | |||||
| Slope compensation with 9A (typ) current limit | fSW = 500kHz, RILIM_TOP = 100kΩ, RILIM_BOT = 49.9kΩ | RSC = 196kΩ | –2.4 | A/µs | |||||
| Slope compensation with 5.6A (typ) current limit | fSW = 500kHz, ILIM = GND | RSC = 196kΩ | –1.8 | A/µs | |||||
| MINIMUM ON TIME AND DEAD TIME | |||||||||
| ton(min) | Minimum on time | 50% to 50% of VIN, ISW = 2A | VIN = 4.5V | 9, 10, 11 | 210 | 235 | ns | 24.31 | |
| VIN = 5V | 9, 10, 11 | 213 | 250 | 24.71 | |||||
| VIN = 12V | 9, 10, 11 | 199 | 250 | 24.111 | |||||
| VIN = 14V | 9, 10, 11 | 199 | 250 | 24.151 | |||||
| toff(min) | Minimum off time | ISW = 2A | 9, 10, 11 | 306 | ns | ||||
| tdead | Dead time | 9, 10, 11 | 70 | ns | |||||
| SWITCHING FREQUENCY AND SYNCHRONIZATION | |||||||||
| fSW | RT programmed switching frequency | RRT = 511kΩ | 4, 5, 6 | 85 | 100 | 115 | kHz | 24.14, 24.15,24.54, 24.55, 24.94, 24.95, 24.134,24.135 | |
| RRT = 90.9kΩ | 4, 5, 6 | 450 | 500 | 550 | 24.26, 24.27, 24.66, 24.67, 24.106,24.107, 24.146,24.147 | ||||
| RRT = 40.2kΩ | 4, 5, 6 | 850 | 1000 | 1150 | 24.28, 24.29, 24.68, 24.69, 24.108,24.109, 24.148,24.149 | ||||
| tSYNC_R | SYNC1, SYNC2 out low-to-high rise time (10% to 90%) | SYNCM = GND, Cload = 25pF, see see SYNCx Rise and Fall Time | 9, 10, 11 | 10 | 21 | ns | 24.18, 24.19,24.58, 24.59,24.98, 24.99,24.138,24.139 | ||
| tSYNC_F | SYNC1, SYNC2 out high-to-low fall time (90% to 10%) | SYNCM = GND, Cload = 25pF, see SYNCx Rise and Fall Time | 9, 10, 11 | 10 | 21 | ns | 24.20, 24.21,24.60, 24.61,24.100,24.101,24.140,24.141 | ||
| SYNCPH_2_1 | SYNC2 to SYNC1 rising edge phase shift | SYNCM = GND, see SYNC2 to SYNC1 Rising Edge Phase Shift | 9, 10, 11 | 82 | 90 | 98 | ° | 24.17,24.57,24.97,24.137 | |
| tSYNC_D | SYNC1 to SW delay | Non-inverted SYNC1 input (SYNC2 =
AVDD, SYNCM = AVDD), see SYNC1 to SW Delay: Non-inverted Sync | VIN = 4.5V | 9, 10, 11 | 140 | 225 | 350 | ns | 24.2 |
| 5V ≤ VIN ≤ 14V | 9, 10, 11 | 120 | 210 | 270 | 24.42, 24.82,24.122 | ||||
| VIN = 12V, IOUT = 12A | 9, 10, 11 | 224 | |||||||
| Inverted SYNC1
input (SYNC2 = GND, SYNCM = AVDD), see SYNC1 to SW Delay: Inverted Sync | VIN = 4.5V | 9, 10, 11 | 150 | 256 | 390 | ns | 24.3 | ||
| 5V ≤ VIN ≤ 14V | 9, 10, 11 | 140 | 240 | 300 | 24.43, 24.83,24.123 | ||||
| VIN = 12V, IOUT = 12A | 9, 10, 11 | 246 | |||||||
| SYNC1 output (SYNCM = GND), see SYNC1 to SW Delay: SYNC1 Output | VIN = 4.5V | 9, 10, 11 | 110 | 180 | 280 | ns | 24.16 | ||
| 5V ≤ VIN ≤ 14V | 9, 10, 11 | 90 | 175 | 250 | 24.56, 24.96,24.136 | ||||
| VIN = 12V, IOUT = 12A | 9, 10, 11 | 184 | |||||||
| VSYNCx(OH) | SYNC1, SYNC2 output high | SYNCM = GND, IOH = 2mA | 4.5V ≤ VIN ≤ 5V | 1, 2, 3 | VIN–0.3 | V | 24.22, 24.23,24.62, 24.63 | ||
| VIN > 5V | 1, 2, 3 | 4.5 | 5 | 5.2 | 24.102,24.103,24.142,24.143 | ||||
| VSYNCx(OL) | SYNC1, SYNC2 output low | SYNCM = GND, IOL = 2mA | 1, 2, 3 | 0.4 | V | 24.24, 24.25,24.64, 24.65,24.104,24.105,24.144,24.145 | |||
| VSYNC1(IH) | SYNC1 input high threshold | SYNCM = AVDD | 1, 2, 3 | 1.7 | V | 24.4,24.44, 24.84,24.124 | |||
| VSYNC1(IL) | SYNC1 input low threshold | SYNCM = AVDD | 1, 2, 3 | 0.7 | 24.5,24.45, 24.85,24.125 | ||||
| fSYNC | SYNC1 input frequency range | SYNCM = AVDD | 4, 5, 6 | 100 | 1000 | kHz | 24.1,24.8, 24.9,24.41, 24.48,24.49, 24.81,24.88, 24.89,24.121,24.128,24.129 | ||
| DSYNC | SYNC1 input duty cycle range | SYNCM = AVDD, external clock duty cycle | 4, 5, 6 | 40% | 60% | 24.10, 24.11,24.50, 24.51,24.90, 24.91,24.130,24.131 | |||
| tCLK_E_I | External clock to internal clock detection time | SYNCM = AVDD, RT populated | 9, 10, 11 | 2 | 5 | (1/fsw) s | 24.12, 24.52,24.92, 24.132 | ||
| tCLK_I_E | Internal clock to external clock detection time | SYNCM = AVDD, RT populated | 9, 10, 11 | 1 | 2 | (1/fsw) s | 24.13, 24.53,24.93, 24.133 | ||
| POWER GOOD AND THERMAL SHUTDOWN | |||||||||
| PWRGDLOW_F% | PWRGD falling threshold (fault), low | Threshold for PWRGD (VSENSE as percent of VREF), VSNS- = 0V | VSENSE falling | 1, 2, 3 | 90% | 92% | 94% | 23.2,23.9, 23.16,23.23 | |
| PWRGDLOW_R% | PWRGD rising threshold (good), low | VSENSE rising | 1, 2, 3 | 93% | 95% | 97% | 23.3,23.10, 23.17,23.24 | ||
| PWRGDHIGH_R% | PWRGD rising threshold (fault), high | VSENSE rising | 1, 2, 3 | 106% | 108% | 110% | 23.4,23.11, 23.18,23.25 | ||
| PWRGDHIGH_F% | PWRGD falling threshold (good), high | VSENSE falling | 1, 2, 3 | 103% | 105% | 107% | 23.5,23.12, 23.19,23.26 | ||
| IPWRGD(LKG) | Output high leakage | VSENSE = VREF, VPWRGD = 7V | 1, 2, 3 | 50 | 500 | nA | 23.6,23.13, 23.20,23.27 | ||
| VPWRGD(OL) | Power good output low | IPWRGD(SINK) = 0mA to 2mA | 1, 2, 3 | 250 | 300 | mV | 23.7,23.14, 23.21,23.28 | ||
| VINMIN_PWRGD | Minimum VIN for valid PWRGD output | Measured when VPWRGD ≤ 0.5V at 100μA | 1, 2, 3 | 1 | 2 | V | 23.1 | ||
| TSD(enter) | Thermal shutdown enter temperature | 170 | °C | ||||||
| TSD(exit) | Thermal shutdown exit temperature | 135 | |||||||
| TSD(HYS) | Thermal shutdown hysteresis | 35 | |||||||
| MOSFET | |||||||||
| RDS_ON_HS | High-side switch
resistance at IHS = 12A | PVIN = VIN = 4.5V | TA = –55℃ | 3 | 38 | 53 | mΩ | ||
| TA = 25℃ | 1 | 50 | 61 | 20.2,20.3 | |||||
| TA = 125℃ | 2 | 64 | 79 | ||||||
| PVIN = VIN = 5V | TA = –55℃ | 3 | 36 | 50 | |||||
| TA = 25℃ | 1 | 48 | 60 | 20.36, 20.37 | |||||
| TA = 125℃ | 2 | 62 | 73 | ||||||
| PVIN = VIN = 12V | TA = –55℃ | 3 | 34 | 45 | |||||
| TA = 25℃ | 1 | 45 | 53 | 20.70, 20.71 | |||||
| TA = 125℃ | 2 | 59 | 67 | ||||||
| PVIN = VIN = 14V | TA = –55℃ | 3 | 34 | 45 | |||||
| TA = 25℃ | 1 | 45 | 53 | 20.104,20.105 | |||||
| TA = 125℃ | 2 | 59 | 67 | ||||||
| RDS_ON_LS | Low-side switch
resistance at ILS = 12A (6) | PVIN = VIN = 4.5V | TA = –55℃ | 3 | 25 | 40 | mΩ | ||
| TA = 25℃ | 1 | 35 | 51 | 21.2,21.3 | |||||
| TA = 125℃ | 2 | 51 | 61 | ||||||
| PVIN = VIN = 5V | TA = –55℃ | 3 | 23 | 35 | |||||
| TA = 25℃ | 1 | 33 | 45 | 21.8,21.9 | |||||
| TA = 125℃ | 2 | 48 | 56 | ||||||
| PVIN = VIN = 12V | TA = –55℃ | 3 | 23 | 32 | |||||
| TA = 25℃ | 1 | 33 | 42 | 21.14, 21.15 | |||||
| TA = 125℃ | 2 | 47 | 55 | ||||||
| PVIN = VIN = 14V | TA = –55℃ | 3 | 23 | 32 | |||||
| TA = 25℃ | 1 | 33 | 42 | 21.20, 21.21 | |||||
| TA = 125℃ | 2 | 47 | 55 | ||||||