SNVS820B APRIL   2013  – December 2016

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Logic Interface Characteristics
    7. 6.7  Recommended External Clock Source Conditions
    8. 6.8  I2C Timing Requirements (SDA, SCL)
    9. 6.9  Typical Characteristics: Current Consumption
    10. 6.10 Typical Characteristics: LED Output
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  LED Drivers Operational Description
        1. 7.3.1.1 LED Driver Current Control
        2. 7.3.1.2 Controlling LED Driver Output PWM
      2. 7.3.2  Direct I2C Register PWM Control Example
      3. 7.3.3  Program Execution Engines
        1. 7.3.3.1 Program Execution Engine States
        2. 7.3.3.2 Program Execution Engine Operation Modes
          1. 7.3.3.2.1 Operation Modes
        3. 7.3.3.3 Program Execution Engine Program Counter (PC)
        4. 7.3.3.4 Program Execution Engine Programming Commands
          1. 7.3.3.4.1 Ramp/Wait
          2. 7.3.3.4.2 Set PWM
          3. 7.3.3.4.3 Go-to-Start
          4. 7.3.3.4.4 Branch
          5. 7.3.3.4.5 End
          6. 7.3.3.4.6 Trigger
        5. 7.3.3.5 Program Load and Execution Example
      4. 7.3.4  Power-Save Mode
      5. 7.3.5  External Clock
      6. 7.3.6  Thermal Shutdown
      7. 7.3.7  Logic Interface Operational Description
      8. 7.3.8  I/O Levels
      9. 7.3.9  ADDR_SEL0, ADDR_SEL1 Pins
      10. 7.3.10 CLK_32 Pin
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
      1. 7.5.1 SRAM Memory
      2. 7.5.2 I2C-Compatible Serial Bus Interface
        1. 7.5.2.1 Interface Bus Overview
        2. 7.5.2.2 Data Transactions
        3. 7.5.2.3 Acknowledge Cycle
        4. 7.5.2.4 Acknowledge After Every Byte Rule
        5. 7.5.2.5 Addressing Transfer Formats
        6. 7.5.2.6 Control Register Write Cycle
        7. 7.5.2.7 Control Register Read Cycle
        8. 7.5.2.8 Register Read/Write Format
    6. 7.6 Register Maps
      1. 7.6.1  Enable Register (Enable) (Address = 00h) [reset = 00h]
      2. 7.6.2  Operation Mode Register (OP Mode) (address = 01h) [reset = 00h]
      3. 7.6.3  B LED Output PWM Control Register (B_PWM) (address = 02h) [reset = 00h]
      4. 7.6.4  G LED Output PWM Control Register (G_PWM) (address = 03h) [reset = 00h]
      5. 7.6.5  R LED Output PWM Control Register (R_PWM) (address = 04h) [reset = 00h]
      6. 7.6.6  B LED Output Current Control Register (B_CURRENT)(address = 05h) [reset = AFh]
      7. 7.6.7  G LED Output Current Control Register (G_CURRENT)(address = 06h) [reset = AFh]
      8. 7.6.8  R LED Output Current Control Register (R_CURRENT) (address = 07h) [reset = AFh]
      9. 7.6.9  Configuration Control Register (CONFIG) (address = 08h) [reset = 00h]
      10. 7.6.10 Engine 1 Program Counter Value Register (Engine 1 PC) (address = 09h) [reset = 00h]
      11. 7.6.11 Engine 2 Program Counter Value Register (Engine 2 PC) (address = 0Ah) [reset = 00h]
      12. 7.6.12 Engine 3 Program Counter Value Register (Engine 3 PC) (address = 0Ah) [reset = 00h]
      13. 7.6.13 STATUS/INTERRUPT Register (address = 0Ch) [reset = 00h]
      14. 7.6.14 RESET Register (address = 0Dh) [reset = 00h]
      15. 7.6.15 WLED Output PWM Control Register (W_PWM) (address = 0Eh) [reset = 00h]
      16. 7.6.16 W LED Output Current Control Register (W_CURRENT) (address = 0Fh) [reset = AFh]
      17. 7.6.17 LED Mapping Register (LED Map) (address = 70h) [reset = 39h]
      18. 7.6.18 Program Memory (address = 10h - 6Fh) [reset = 00h]
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Current Configuration
        2. 8.2.2.2 PWM Frequency Configuration
        3. 8.2.2.3 Clock Source Configuration
        4. 8.2.2.4 Power-Save Mode Configuration
        5. 8.2.2.5 Light Engine Configuration
      3. 8.2.3 Application Curve
  9. Power Supply Recommendation
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Device and Documentation Support

Device Support

Third-Party Products Disclaimer

TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.

Documentation Support

Related Documentation

For additional information, see the following:

AN-1112 DSBGA Wafer Level Chip Scale Package.

Community Resources

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Trademarks

E2E is a trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

Electrostatic Discharge Caution

esds-image

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

Glossary

SLYZ022TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.