SNVU543A November   2016  – December 2016 LM5170 , LM5170-Q1

 

  1.   LM5170-Q1 EVM User Guide
    1.     Trademarks
    2. 1 Features and Electrical Performance
    3. 2 Setup
      1. 2.1 EVM Configurations
      2. 2.2 Bench Setup
      3. 2.3 Test Equipment
    4. 3 Test Procedure
      1. 3.1 Buck Mode Power-Up and Power-Down Sequence
      2. 3.2 Boost Mode Power-Up and Power-Down Sequence
      3. 3.3 Bidirectional Operation Power-Up and Power-Down Sequence
      4. 3.4 Operating the EVM With the Onboard Analog Loop Control Circuit
      5. 3.5 Operating the EVM With External MCU or Other Digital Circuit
    5. 4 Test Data
      1. 4.1  Efficiency
      2. 4.2  Current Regulation and Monitoring
      3. 4.3  Typical Master Enable Power Up and Shutdown
      4. 4.4  Channel Enable and Disable
      5. 4.5  Dual-Channel Interleaving Operation
      6. 4.6  ISETA Tracking
      7. 4.7  Diode Emulation Preventing Negative Currents
      8. 4.8  Dynamic DIR Change
      9. 4.9  Step Load Response
      10. 4.10 OVP
      11. 4.11 Output Short Circuit
    6. 5 Design Files
      1. 5.1 Schematics
      2. 5.2 Bill of Materials
      3. 5.3 Board Layout
  2.   Revision History

3 Test Procedure

Please read the LM5170-Q1 datasheet (SNVSAQ6) and this user guide before using the EVM. A typical EVM test bench setup is shown in Figure 2. The power supplies and loads should be capable of handling the input and output voltage and current rating of the board.

The EVM operation requires the four external control signals, which are UVLO, DIR, EN1/2, and ISETA or ISETD (refer to Figure 3).

  • UVLO: The master enable command. Apply a voltage > 2.5 V and < 6 V between J17-pins 5 and 6 to enable the EVM. Pulling the voltage at J17-pin 5 low will keep the EVM in shutdown mode.
  • DIR: the current direction command. Apply a voltage > 2 V at J17-pin 9 or J18-pin 9 to operate the EVM in Buck Mode. Apply a voltage < 1 V at the same pin to operate the EVM in Boost Mode. DIR command can also be programmed using J28. Note that DIR must be either active high or low to operate the EVM. If the DIR signal is floating, the EVM will not run.
  • EN1 and EN2: The channel switching enable commands. Apply a voltage > 2 V at J17-pin 7 will turn on CH-1 converter, and at J17-pin 21 will turn on CH-2 converter. Removing the voltage at the EN1 and EN2 pins to disable each channel. The channel enable can also be controlled by J29, J30 and J25.
  • ISETA or ISETD: The Channel current regulation setting. Applying an analog voltage across J17-pins 11 and 12, or J18-pins 11 and 12, or a PWM signal across J17-pins 13 and 14, or J18-pins 13 and 14, the EVM will regulate the channel DC current, which is also the power inductor dc current, to a level proportional the ISETA voltage or ISETD PWM duty ratio. ISETA is controlled by the onboard analog outer voltage control loop when it is closed. Note that, ISETA=1.5 V, or ISETD PWM duty ratio of 48%, will command the EVM to produce 60 A into or out of the 12VDC-port, depending on the operation mode.

For initial test, TI recommends using the onboard 10-V bias supply by closing the J4 and J21-pins 2 and 3. The user can also apply an external 10-V bias supply between J17-Pins 43 and 44, but remember to open J4 and J21 in order to disable the onboard 10-V bias supply.
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