SNVU658B March   2020  – May 2021 TPS54J060 , TPS54J061

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Background
    2. 1.2 Performance Specification Summary
    3. 1.3 Modifications
      1. 1.3.1 Output Voltage Setpoint
      2. 1.3.2 Frequency and Operation Mode Setting
      3. 1.3.3 Enable Pin Selection
      4. 1.3.4 Adjustable UVLO
  3. 2Test Setup and Results
    1. 2.1  Input/Output Connections
    2. 2.2  Start Up Procedure
    3. 2.3  Efficiency
    4. 2.4  Load and Line Regulation
    5. 2.5  Load Transients
    6. 2.6  Loop Characteristics
    7. 2.7  Output Voltage Ripple
    8. 2.8  Input Voltage Ripple
    9. 2.9  Powering Up and Down with EN
    10. 2.10 Powering Up and Down With VIN
    11. 2.11 Start-Up Into Pre-Bias
    12. 2.12 Current Limit
  4. 3Schematic, List of Materials, and Layout
    1. 3.1 Schematic
    2. 3.2 List of Materials
    3. 3.3 Layout
  5.   Revision History

Load and Line Regulation

Figure 2-9 and Figure 2-10 shows the load regulation measured on the TPS54J060EVM-067. The output voltage of the TPS54J061EVM-067 is only slightly higher at 1.81V typical due to the different feedback divider.

GUID-2F42CDFF-CDC3-465C-BCB9-32F122DADECD-low.gifFigure 2-9 Load Regulation – FCCM
GUID-77EC4493-2E1E-4D91-9AA4-A21D6346C862-low.gifFigure 2-11 Line Regulation
GUID-CBA91845-E957-4614-AE84-9C88995B5F34-low.gifFigure 2-10 Load Regulation – DCM