The TLV841C device variant has two options for setting the RESET time delay: connect CT pin to a capacitor to GND, or leave CT pin floating. The reset time delay can be set to a minimum value of 80 µs by leaving the CT pin floating, or a maximum value of approximately 6.2 seconds by connecting 10 µF delay capacitor. The reset time delay (t_D) can be programmed to any value within the range by connecting a capacitor no larger than 10 µF between CT pin and GND. The relationship between external capacitor (C_{CT_EXT}) at CT pin and the RESET time delay is given by Equation 1.

Equation 1 is simplified to Equation 2 by plugging R_CT and T_{D(no cap)} given in the Electrical Characteristics Table in TLV841 datasheet.

Equation 3 solves for external capacitor value (C_{CT_EXT})

The recommended maximum delay capacitor for the TLV841C is limited to 10 µF as this ensures there is enough time for the capacitor to fully discharge when the reset condition occurs. When a voltage fault occurs, the previously charged up capacitor discharges, and if the monitored voltage returns from the fault condition before the delay capacitor discharges completely, the delay capacitor will begin charging from a voltage above zero and the reset delay will be shorter than expected. Larger delay capacitors can be used so long as the capacitor has enough time to fully discharge during the duration of the voltage fault.

The TLV841EVM provides jumper J6 to configure the CT pin and test point TP3 to monitor the CT pin. Place a shunt jumper on pin 1 (left pin) and pin 2 (middle pin) of jumper J6 to connect CT to delay capacitor C2. This connects the CT pin to a 0.01 µF capacitor to set the RESET delay (t_D) to ~6.2 ms. Place a shunt between pin 2 (middle pin) and pin 3 (right pin) of jumper J6 to connect CT to delay capacitor C3. This connects the CT pin to a 0.1 µF capacitor to set the RESET delay (t_D) to ~61.9 ms. By removing the shunt jumper from jumper J6, the RESET time delay defaults to the minimum value of 80 µs or less. If using a different delay capacitor, the capacitor must be ≥ 100 pF to be recognized.

For the TLV841M / TLV841S variant or TLV841C where C_T is floating, Figure 4-3 shows the typical reset delay time. Depending on how much VDD deviates from the specified threshold, the typical reset delay value (~40 µs) may be shorter or longer.