SNVU755A January   2021  – June 2021 TLV841

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Related Documentation
    2. 1.2 TLV841 Applications
  3. 2Schematic, Bill of Materials, and Layout
    1. 2.1 TLV841EVM Schematic
    2. 2.2 TLV841EVM Bill of Materials
    3. 2.3 Layout and Component Placement
    4. 2.4 Layout
  4. 3EVM Connectors
    1. 3.1 EVM Test Points
    2. 3.2 EVM Jumpers
  5. 4EVM Setup and Operation
    1. 4.1 Input Power (VDD)
    2. 4.2 Monitoring Voltage on SENSE Pin (TLV841S)
    3. 4.3 Monitoring Voltage on VDD (TLV841M and TLV841C)
    4. 4.4 Manual Reset (MR) (TLV841M)
    5. 4.5 Reset Output (RESET)
    6. 4.6 Reset Time Delay Programming (Program tD via CT) (TLV841C)
  6. 5Revision History

4.1 Input Power (VDD)

The VDD supply is connected through the J2 header on board. Both pins of jumper J2 are connected together where power can be applied to either pin. The TLV841S voltage range is 0.85 V to 5.5 V whereas the TLV841C and TLV841M has a voltage range of 0.7 V to 5.5 V for the open-drain (DL) and push-pull (PL) active-low variants. For all push-pull active-high (PH) variants, the voltage range is 1 V to 5.5 V.
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