- Use the VIN+ and VIN– test points along
with the VOUT+ and VOUT– test points located near the power terminal blocks as voltage
monitoring points where voltmeters are connected to measure the input and output voltages,
respectively. Do not use these sense terminals as the input supply or output load
connection points. The PCB traces connected to these sense terminals are not designed
to support high currents.
- Header J3 provides access to the following
test points:
- VIN
- EN
- SYNC
- VCC
- PGD
- BIAS
- VOUT
- INJ
The SYNC test point provides a convenient location to connect an external clock signal.
The power-good (PGD) test point is available to monitor when a valid output voltage is
present on the EVM. Refer to Section 4.1 for specific information related to the various test points.
Note:
The default switching frequency of the EVM
is 2.1 MHz. Adjust the switching frequency by applying a clock signal at the SYNC test
point. Note that lower frequency can necessitate a change in buck inductance to maintain a
recommended 30% to 50% inductor peak-to-peak ripple current and optimal internal slope
compensation contribution. Refer to the LM63460-Q1 or LM64460-Q1 data sheets, LM63k-LM64k Quickstart Calculator, and WEBENCH® Power Designer for additional guidance related to
converter operation and component selection..