SNVU769A September 2021 – October 2022
LP877451Q1EVM has many terminal blocks, jumpers and test points to offer certain flexibility to help users to verify the EVM according to their application conditions. However, the EVM is pre-configured with default jumper settings and users can power up the regulators without the need of jumper modifications. Setting these jumpers correctly for the correct function of the EVM is important. Table 3-1 lists all the terminal blocks on the EVM and Table 3-2 lists the jumpers and their functionality. All the terminal blocks are marked with polarity and Pin 1 of test points / jumpers are marked with white dot for identification purpose. To understand more about the jumper functionality, see the schematic diagrams in Section 6.1.
| Terminal Block Number | Terminal Block Name | Description |
|---|---|---|
| J1 | VIN 3.3V | 3.3 V External Input Voltage |
| J17 | VIO_LDO | Terminal block for VIO_LDO Output |
| J18 | BOOST | Terminal block for BOOST Output |
| J24 | BUCK1 | Terminal block for BUCK1 Output |
| J25 | BUCK3 | Terminal block for BUCK3 Output |
| J26 | BUCK2 | Terminal block for BUCK2 Output |
| J30 | J30 | USB Connector |
| J33 | VBAT | 5 V - 20 V Input |
| Jumper/Connector Number | Jumper/Connector Name | Configuration | Description |
|---|---|---|---|
| J2 | WD_DIS | Closed (Default) | Pull down resistor in CS_SPI pin enabled which will disable Q&A watchdog during the PMIC power up. For this to be effective, USB cable should not be connected to the EVM when the PMIC is powered up. If USB cable is connected before PMIC is powered up, USB MCU will drive this pin high (through CS_SPI_WD at J15) during the startup |
| Open | Q&A watchdog not disabled during the PMIC power up | ||
| J3 | EN_PVIN_3V3 | Closed (Default) | Connects PMIC ENABLE pin to PVIN_Bx pins (PVIN_3V3) through a pull up resistor and device gets enabled as soon as 3.3 V is generated/applied |
| Open | If PMIC needs to be enabled through USB/GUI or through pre-regulator PGOOD signal, then this jumper must be kept open | ||
| J4 | PVIN_3V3 | Option 1: Pins 1/3 and 2/4 3V3_PREREG (Default) |
PVIN_3V3 connected to preregulator output. J4-Option-2 must be open and J5 must be open. |
| Option 2: Pins 5/7 and 6/8 3V3_PS |
PVIN_3V3 connected to external 3.3V supply (J1). J4-Option-1 must be open and J5 must be open. |
||
| J5 | 3V3_USB | Open (Default) | Either option from J4 must be used. |
| Closed |
PMIC input supply (PVIN_3V3) is generated from USB supply. J4 jumpers must be open if this jumper is closed. |
||
| J6 | EN_LVPMIC | Option 1: Open (Default) | PMIC Enable signal from 3.3 V Input. J3 must be closed |
| Option 2: Pins 1 and 2 | PMIC Enable signal path from GUI interface. J3 must be open if this Option is used | ||
| Option 3: Pins 2 and 3 | PMIC Enable signal path from pre-regulator PGOOD signal. J3 must be open if this Option is used | ||
| J8 | VIO_SEL | Pins 1 and 2 | 3.3 V supply generated from USB supply |
| Pins 2 and 3 (Default) | 3.3 V VIO supply generated from PMIC VIO_LDO | ||
| J9 | SYNCCLKIN | Pins 1 and 2 | SYNCCLKIN pin connected to MCU clock port (used for testing external clock input signal) |
| J10 | VMON1_SEL | Pins 1 and 2 (Default: open) | VMON1 reference voltage generated from voltage divider on VIO supply |
| Pins 2 and 3 (Default: open) | VMON1 voltage taken from BUCK1 (1.8 V) output | ||
| J12 | nRSTOUT | Pins 1 and 2 (Default) | Connects PMIC nRSTOUT signal to MCU port directly |
| Pins 2 and 3 | Connects PMIC nRSTOUT signal to MCU port through level shifter (series resistors must be mounted if this option is used) | ||
| J13 | VMON1_GPO1 | Pins 1 and 2 (Default: open) | Connects PMIC VMON1 signal to MCU port directly |
| Pins 2 and 3 (Default: open) | Connects PMIC VMON1 signal to MCU port through level shifter (series resistors must be mounted if this option is used) | ||
| J14 | nINT | Pins 1 and 2 (Default) | Connects PMIC nINT signal to MCU port directly |
| Pins 2 and 3 | Connects PMIC nINT signal to MCU port through level shifter (series resistors must be mounted if this option is used) | ||
| J15 | SCLK_SPI | Pins 1 and 2 (Default) | Connects PMIC SCLK_SPI signal to MCU SCLK_SPI port directly |
| Pins 2 and 3 | Connects PMIC SCLK_SPI signal to MCU SCLK_SPI port through a level shifter (series resistors need to be mounted if this option is used) | ||
| SDO_SPI | Pins 1 and 2 (Default) | Connects PMIC SDO_SPI signal to MCU SDO_SPI port directly | |
| Pins 2 and 3 | Connects PMIC SDO_SPI signal to MCU SDO_SPI port through a level shifter (series resistors need to be mounted if this option is used) | ||
| CS_SPI_WD | Pins 1 and 2 (Default) | Connects PMIC CS_SPI signal to MCU CS_SPI port directly | |
| Pins 2 and 3 | Connects PMIC CS_SPI signal to MCU CS_SPI port through a level shifter (series resistors must be mounted if this option is used) | ||
| SDI_SPI | Pins 1 and 2 (Default) | Connects PMIC SDI_SPI signal to MCU SDI_SPI port directly | |
| Pins 2 and 3 | Connects PMIC SDI_SPI signal to MCU SDI_SPI port through a level shifter (series resistors need to be mounted if this option is used) | ||
| J16 | nERR_GPO2 | Pins 1 and 2 (Default) | Connects PMIC nERR_GPO signal to MCU port directly |
| Pins 2 and 3 | Connects PMIC nERR_GPO2 signal to MCU port through level shifter (series resistors must be mounted if this option is used) |