SNVU792 September 2021 LM5152-Q1
Section 2 describes the connection points of the evaluation module. Table 2-2 to Table 2-4 describe these connections. Table 2-2 lists the power connections of the evaluation module. These connections are intended to handle relatively large currents.
| JUMPER | PIN | DESCRIPTION |
|---|---|---|
| J1 | VIN+ | Positive input voltage power for the evaluation module |
| J2 | VOUT+ | Positive output voltage power for the evaluation module |
| J4 | GND | Negative output voltage power for the evaluation module |
| J5 | VIN– | Negative input voltage power for the evaluation module |
Table 2-3 lists the EVM jumpers and test points that configure the LM5152-Q1 as desired. These jumpers can set different modes of operation or provide signals to different pins of the LM5152-Q1.
| JUMPER | PINS | DESCRIPTION | DEFAULT CONNECTION |
|---|---|---|---|
| J7 | Pin 1 to Pin 2 | SYNC/DITHER/VH/CP is pulled to VCC through a 1-kΩ resistor to enable the internal charge pump or enable the VCC holdup functionality. This connection must not be made if the J10 is populated. | |
| Pin 2 to Pin 3 | SYNC/DITHER/VH/CP is pulled to AGND through a 1-kΩ resistor to disable the internal charge-pump and VCC holdup functionality. | ||
| Open | If an external clock synchronization on J10 is used, leave this jumper open. | X | |
| J9 | VTRK_D | PWM signal applied through a two stage low-pass filters to the TRK pin. R17 must be populated. | |
| J10 | Pin 1 to Pin 2 | SYNC/DITHER/VH/CP pulled to ground, disabling dithering, internal charge-pump functionality, and VCC holdup functionality. J10 must not be populated when J7 is populated between pin 1 and pin 2. | X |
| Open | Dithering is enabled. To synchronize to an external clock, remove C37. | ||
| J11 | Pin 1 to Pin 2 | Bypass D1 to tie either VIN or VOUT nets to the BIAS pin. | X |
| Open | Either VIN or VOUT is supplied through D1 to the BIAS pin. | ||
| J12 | Pin 1 to Pin 2 | VIN is supplied to the BIAS pin. This is the default connection. | X |
| Pin 2 to Pin 3 | VOUT is supplied to the BIAS pin. | ||
| J13 | Pin 1 to Pin 2 | Connect an auxiliary power supply that can be used to supply power to the BIAS pin. J11 must be open if this is populated. | |
| Pin 2 to Pin 3 | Connect VCC to BIAS. | ||
| Open | X | ||
| J14 | Pin 1 to Pin 2 | Configures light-load switching operation to be FPWM | X |
| Pin 2 to Pin 3 | Configures light-load switching operation to be diode emulation | ||
| Open | Configures light-load switching operation to be skip | ||
| TP6 | Positive input to the VAUX net | ||
| TP7 | Negative input to the VAUX net | ||
| TP8 | Positive input to the TRK pin | ||
| TP9 | Negative input to the TRK pin |
Table 2-4 indicates the dedicated voltage probe points of the EVM. These points are used to make measurements on the EVM.
| SENSE POINT | NAME | DESCRIPTION |
|---|---|---|
| TP1 | VIN+ | Sense point for the positive input voltage |
| TP2 | VOUT+ | Sense point for the positive output voltage |
| TP3 | SW | Sense point for the switch node of the boost controller |
| TP4 | GND | Sense point for the negative output voltage |
| TP5 | VIN– | Sense point for the negative input voltage |
| J3 | PGND | Power ground connection |
| J6 | PGND | Power ground connection |
| J8 | 1 | BIAS |
| 2 | VCC | |
| 3 | STATUS | |
| 4 | UVLO | |
| 5 | COMP | |
| 6 | SS | |
| 7 | AGND |