Since each flash cell is capable of over 100,000 write-erase cycles, and there are seven image copies available for each word in a block, the expectation is that the word is capable of over 700,000 write-erase cycles. That is true, but other words in the sector have an impact on the total number of write-erase cycles that any flash cell sees. A write-erase cycle will occur on a flash cell each time it is changed from a zero to a one. That is, each time electrons are pulled off of the floating gate through the erase oxide. Take an extreme example of two words programmed into a data block. The first word is updated 700,000 times, the second word is not updated at all. Assume the least significant bit of both words is always 0. Because of the 700,000 writes, the sector containing that block will be erased 100,000 times. As expected, the word that was changed 700,000 times will have seen 100,000 write-erase cycles on the least significant bit in all seven images. Those bits will be nearing end of life. Perhaps unexpectedly, the least significant bit of the second word, which was never updated, will also have seen 100,000 write-erase cycle in just the first image. That bit too will be nearing end of life.

In typical applications, different words are updated at varying frequencies. Since the word most often updated, may not be the one updated the most often within a stretch of seven updates, a conservative limit of 500,000 cycles is specified for the most often updated word in the sector.

When large amounts of data are written in a single sweep, the full 600,000 write-erase cycle advantage of the wear leveling can be achieved. Adding software wear leveling, even greater number of write-erase cycles are possible.