SPMA082 August   2021 TM4C1230C3PM , TM4C1230D5PM , TM4C1230E6PM , TM4C1230H6PM , TM4C1231C3PM , TM4C1231D5PM , TM4C1231D5PZ , TM4C1231E6PM , TM4C1231E6PZ , TM4C1231H6PGE , TM4C1231H6PM , TM4C1231H6PZ , TM4C1232C3PM , TM4C1232D5PM , TM4C1232E6PM , TM4C1232H6PM , TM4C1233C3PM , TM4C1233D5PM , TM4C1233D5PZ , TM4C1233E6PM , TM4C1233E6PZ , TM4C1233H6PGE , TM4C1233H6PM , TM4C1233H6PZ , TM4C1236D5PM , TM4C1236E6PM , TM4C1236H6PM , TM4C1237D5PM , TM4C1237D5PZ , TM4C1237E6PM , TM4C1237E6PZ , TM4C1237H6PGE , TM4C1237H6PM , TM4C1237H6PZ , TM4C123AE6PM , TM4C123AH6PM , TM4C123BE6PM , TM4C123BE6PZ , TM4C123BH6PGE , TM4C123BH6PM , TM4C123BH6PZ , TM4C123BH6ZRB , TM4C123FE6PM , TM4C123FH6PM , TM4C123GE6PM , TM4C123GE6PZ , TM4C123GH6PGE , TM4C123GH6PM , TM4C123GH6PZ , TM4C123GH6ZRB , TM4C1290NCPDT , TM4C1290NCZAD , TM4C1292NCPDT , TM4C1292NCZAD , TM4C1294KCPDT , TM4C1294NCPDT , TM4C1294NCZAD , TM4C1297NCZAD , TM4C1299KCZAD , TM4C1299NCZAD , TM4C129CNCPDT , TM4C129CNCZAD , TM4C129DNCPDT , TM4C129DNCZAD , TM4C129EKCPDT , TM4C129ENCPDT , TM4C129ENCZAD , TM4C129LNCZAD , TM4C129XKCZAD , TM4C129XNCZAD

 

  1.   Trademarks
  2. 1TFT LCD Overview
    1. 1.1 Typical Interfaces
    2. 1.2 Frame Buffer
      1. 1.2.1 Frame Buffer Size Calculation
    3. 1.3 Frame Rate (FPS)
    4. 1.4 Touch Display
  3. 2LCD Controller Overview
    1. 2.1 Block Diagram
      1. 2.1.1 Raster Controller
      2. 2.1.2 LIDD Controller
  4. 3TivaWare Graphics Library (grlib)
    1. 3.1 Graphics Library Structure
      1. 3.1.1 Display Driver Overview
      2. 3.1.2 Low-Level Primitive Graphics API Overview
      3. 3.1.3 Widget API Overview
      4. 3.1.4 Input Driver Overview
  5. 4Display Driver Adaptation
    1. 4.1 Off-Screen Display Drivers
    2. 4.2 Individual Display Driver Functions
      1. 4.2.1 Init
      2. 4.2.2 ColorTranslate
      3. 4.2.3 PixelDraw
      4. 4.2.4 PixelDrawMultiple
      5. 4.2.5 LineDrawH
      6. 4.2.6 LineDrawV
      7. 4.2.7 RectFill
      8. 4.2.8 Flush
  6. 5Fonts
    1. 5.1 Creating Custom Fonts for Different Languages
  7. 6Useful Utilities
    1. 6.1 Pnmtoc
    2. 6.2 mkstringtable and ftrasterize
  8. 7References
  9.   A Appendix A

Frame Rate (FPS)

Frame rate is the frequency at which consecutive frames appear on a display. The maximum frame rate is determined by the image size in combination with the pixel clock rate. More precisely, the pixel clock frequency, the size of the display, and the porch intervals determine the frame rate. The porch intervals that are expressed in terms of pixel clocks refer to the blanking period between each line and each frame. For the duration required for the porch intervals, see the device-specific data sheet. The FPS can be expressed as:

FPS = Fpixel_clock / ((HBP + Resolution Width + HFP) x (VBP + Resolution Height + VFP))

Suppose the following example:

Pixel clock = 60 MHz LCD clock (This is the maximum LCD clock on TM4C129 MCU.)

LCD Controller mode = parallel RGB interface (24-bit bus)

Color depth = 24-bit

Resolution = QXGA (2048 x 1536)

Porch intervals = Assume insignificant compared to the resolution width and height

FPS = 60 MHz / (2048 x 1536) = 19 or less if porch intervals is taken into consideration

For video playback, normally a minimum of 24FPS is needed for human eyes to render the motion smoothly. Therefore, there is a compromise between FPS, display resolution, and color depth when choosing the optimal displays to use.

Suppose another example using a SPI interface:

Pixel clock = 60 MHz SPI clock (This is the maximum SPI clock on TM4C129 MCU.)

LCD Controller mode = SPI Interface

Color depth = 24-bit

Resolution = QVGA (320 x 240)

Porch intervals = Assume insignificant compared to the resolution width and height

FPS = 60 MHz / (2048 x 2048 x 24) = 35 or less if porch intervals is taken into consideration

Theoretically, it is possible to support a small display with video playback at greater than 24 FPS.