SPMA082 August 2021 TM4C1230C3PM , TM4C1230D5PM , TM4C1230E6PM , TM4C1230H6PM , TM4C1231C3PM , TM4C1231D5PM , TM4C1231D5PZ , TM4C1231E6PM , TM4C1231E6PZ , TM4C1231H6PGE , TM4C1231H6PM , TM4C1231H6PZ , TM4C1232C3PM , TM4C1232D5PM , TM4C1232E6PM , TM4C1232H6PM , TM4C1233C3PM , TM4C1233D5PM , TM4C1233D5PZ , TM4C1233E6PM , TM4C1233E6PZ , TM4C1233H6PGE , TM4C1233H6PM , TM4C1233H6PZ , TM4C1236D5PM , TM4C1236E6PM , TM4C1236H6PM , TM4C1237D5PM , TM4C1237D5PZ , TM4C1237E6PM , TM4C1237E6PZ , TM4C1237H6PGE , TM4C1237H6PM , TM4C1237H6PZ , TM4C123AE6PM , TM4C123AH6PM , TM4C123BE6PM , TM4C123BE6PZ , TM4C123BH6PGE , TM4C123BH6PM , TM4C123BH6PZ , TM4C123BH6ZRB , TM4C123FE6PM , TM4C123FH6PM , TM4C123GE6PM , TM4C123GE6PZ , TM4C123GH6PGE , TM4C123GH6PM , TM4C123GH6PZ , TM4C123GH6ZRB , TM4C1290NCPDT , TM4C1290NCZAD , TM4C1292NCPDT , TM4C1292NCZAD , TM4C1294KCPDT , TM4C1294NCPDT , TM4C1294NCZAD , TM4C1297NCZAD , TM4C1299KCZAD , TM4C1299NCZAD , TM4C129CNCPDT , TM4C129CNCZAD , TM4C129DNCPDT , TM4C129DNCZAD , TM4C129EKCPDT , TM4C129ENCPDT , TM4C129ENCZAD , TM4C129LNCZAD , TM4C129XKCZAD , TM4C129XNCZAD
Take the Kentec 320x240x16 QVGA display module as an example, how much frame buffer memory would be needed to display one full screen? Assume that 16-bit color depth is needed. 16-bit color depth means that two bytes are needed for each pixel.
Frame buffer size (FB) = Number of pixels x color depth / 8
The TM4C129x MCU has 256KB of internal SRAM. Therefore, there is enough internal SRAM to be used as frame buffer for a 320x240x16 displays and perhaps enough SRAM left for system memory to support other MCU functions.
As the display resolution increases, the more frame buffer is needed. A 480 x 272 display with 16-bit color depth would require 261KB of frame buffer. As expected, the TM4C129 internal SRAM is not sufficient in this scenario. In this case, an external memory dedicated for the frame buffer and accessed through the EPI interface is required.
Using the internal RAM for frame buffers makes the read and write access as fast as possible by the MCU. It will normally translate to smoother display viewing. Having multiple frame buffers will further imply no visual artifacts like tearing will appear as one frame buffer is used for writing the next resulting image while the other frame buffer is used for transferring current image to the display. However, the internal RAM is usually a limited resource as it is used by many parts of a system. Therefore, using internal RAM may be limited to smaller display applications.
The LCD controller on the TM4C129x MCU can support a maximum resolution of 2048 x 2048 pixels. Therefore, the limitation on the maximum resolution of a display will depend on the amount of memory that can be dedicated for frame buffers.