SPRAA99C March   2008  – May 2021 AM3351 , AM3352 , AM3354 , AM3356 , AM3357 , AM3358 , AM3359 , AM4372 , AM4376 , AM4377 , AM4378 , AM4379 , OMAPL138B-EP , TMUX646

 

  1.   Trademarks
  2. 1Introduction
  3. 2PCB Design Considerations
    1. 2.1 Solder Land Areas
    2. 2.2 Conductor Width/Spacing
    3. 2.3 High-Density Routing Techniques
    4. 2.4 Via Density
    5. 2.5 Conventional PCB Design
    6. 2.6 Advanced Design Methods
  4. 3Reliability
    1. 3.1 Reliability Calculations
    2. 3.2 Package Characteristics
    3. 3.3 Thermal Modeling
  5. 4Surface-Mounting nFBGA Packages
    1. 4.1 Design for Manufacturability (DFM)
    2. 4.2 Solder Paste
    3. 4.3 Solder Ball Collapse
    4. 4.4 Reflow
    5. 4.5 Inspection
  6. 5Packing and Shipping
    1. 5.1 Tray Packing Method
    2. 5.2 Tape-and-Reel Packing Method
    3. 5.3 Tape Format
    4. 5.4 Device Insertion
    5. 5.5 Packaging Method
  7. 6Sockets
    1. 6.1 The Design Challenge
    2. 6.2 Contacting the Ball
    3. 6.3 Pinch Contact
    4. 6.4 Micro Tuning Fork Contact
    5. 6.5 Texas Instruments Sockets
  8. 7Summary
  9.   A Frequently Asked Questions
    1.     A.1 Package Questions
    2.     A.2 Assembly Questions
    3.     A.3 Small Body nFBGA Package Questions
  10.   B Package Data Sheets
  11.   C Thermal Modeling Results
  12.   Revision History

Reliability

Reliability is one of the first questions designers ask about any new packaging technology. They want to know how well the package will survive handling and assembly operation, and how long it will last on the board. The elements of package reliability and system reliability, while related, focus on different material properties and characteristics and are tested by different methods.

Package reliability focuses on materials of construction, thermal flows, material adherence/delamination issues, resistance to high temperatures, moisture resistance and ball/stitch bond reliability. Thorough engineering of the package is performed to prevent delamination caused by the interaction of the substrate material and the mold compound.

TI subjects each nFBGA to rigorous qualification testing before the package is released to production. These tests are summarized in Table 3-1. All samples used in these tests are preconditioned according to guidelines of the Joint Electronic Device Committee (JEDEC) A113 at various levels. Typical data is presented in Table 3-2. The nFBGA packages have proven robust and reliable.

Table 3-1 Package-Level Reliability Tests
Test Environments Conditions Read Points
HAST 85RH/85°C 600 hrs., 1000 hrs.
Temp. Cycle -55/125°C 500 cycles, 750 cycles, 1000 cycles
Thermal Shock -55/125°C 200 cycles, 500 cycles, 750 cycles, 1000 cycles
HTOL 125°C, Op. voltage 500 hrs., 600 hrs., 1000 hrs.
HTOL(1) 140°C, Op. voltage 500 hrs.
HTOL(1) 140°C, Op. voltage 500 hrs.
Bake(1) 150°C, 170°C 600 hrs., 1000 hrs., 420 hrs.
HAST(1) 170°C 96 hrs.
Optional tests. One or more of them may be added to meet customer requirements.
Table 3-2 Package-Level Reliability Test Results
Package Types
Leads 113ZVD 289ZVL 289ZWE
Body (mm) 8x8 12x12 13x13
Die (mm) 4.2 × 4.2 5.8 × 5.7 10.6 × 8.2 (Die 1) 8.1 × 7.7 (Die 2)
Level 3 3 3
Test Environment
T/C, -55/125°C (500 cycles)
(1000 cycles)
0/78
0/78
0/83
0/83
0/246
0/245
T/S, -55/125°C (500 cycles)
(1000 cycles)
0/77
0/77
0/77
0/77
HAST,
85°C/85%RH
(600 cycles)
(1000 cycles)
0/78
0/78
0/78
0/78
0/77
0/77
150°C Storage (600 cycles)
(1000 cycles)
0/45
0/45
0/77
0/77
0/77
0/77
HTOL (1000 hrs.) 0/120

Board-level reliability (BLR) issues generally focus on the complex interaction of various materials under the influence of heat generated by the operation of electronic devices. Not only is there a complex thermal situation caused by multiple heat sources, but there are cyclical strains due to expansion mismatches, warping and transient conditions, non-linear material properties, and solder fatigue behavior influenced by geometry, metallurgy, stress relaxation phenomenon, and cycle conditions. In addition to material issues, board and package design can influence reliability. Thermal management from a system level is critical for optimum reliability, and thermal cycling tests are generally used to predict behavior and reliability. Many of these are used in conjunction with solder fatigue life models using a modified Coffin-Manson strain range-fatigue life plots (number of cycles to failure has an inverse exponential relationship with the thermal cycle temperature range).

In addition to device/package testing, board-level reliability testing has been extensively performed on the nFBGA packages. Various types of daisy-chained packages were assembled to special boards, with electrical measurements made in the initial state and then at intervals after temperature cycles were run. Table 3-3 shows a summary of a wide range of board-level reliability.

Table 3-3 Board-Level Reliability Summary
Conditions (With Solder Paste) Failures/Sample Size
Requirements Extended Range
Package TI Mfg Site Body Pitch Die Temp. 500 800 1000 1500 2000 2500 3000
Test Site (mm) (mm) (mm) Cycle (°C) (Cycles) (Cycles)
ZVD
113 balls
TI Hiji 8×8 0.65 5x5 -40/125 0/36 0/36 0/36 0/36 0/36 0/36 0/36
ZVD
113 balls
TI Hiji 8×8 0.65 4.2x4.2 -40/125 0/48 0/48 0/48 0/48 0/48 0/48 4/43
ZVD
289 balls
TI Hiji 12×12 0.50 9x9 -40/125 0/95 0/95 0/95 0/95 0/95 0/94 0/94
ZVD
289 balls
TI Hiji 12×12 0.50 6.5x6.5 -40/125 0/36 0/36 0/36 0/36 0/36 0/36 1/36
ZWA
11 Balls
TI Phi 2x 1.4 0.4 1x0.6 -40/85 0/33 0/33 0/33 0/33 0/33 0/33 0/33

Table 3-4 summarizes conclusions from the testing. Two important conclusions are that the PCB pad size needs to match the via size, and that solder paste is needed for attachment to give optimal reliability.

Table 3-4 Summary of Significant BLR Improvements
Condition Improved BLR →
Die size Larger Smaller
Die edge Over balls Within ball matrix
Ball count Smaller Larger
Ball size Smaller Larger
PCB pad size Over/undersized Matches package via (for NSMD ~90% of via)
Solder paste None or insufficient Thickness 0.10 nom. (type matches reflow)