SPRABA5D January   2014  – January 2019 AM1802 , AM1802 , AM1806 , AM1806 , AM1808 , AM1808 , AM1810 , AM1810

 

  1.   Using the AM18xx Bootloader
    1.     Trademarks
    2. Introduction
    3. Boot Modes
    4. Non-AIS Boot Modes
      1. 3.1 NOR Boot
        1. 3.1.1 Legacy NOR Boot
        2. 3.1.2 Direct NOR Boot
        3. 3.1.3 AIS NOR Boot
      2. 3.2 Host Port Interface (HPI) Boot
      3. 3.3 Emulation Debug Boot
    5. Application Image Script (AIS) Boot
      1. 4.1  Section Load Command (0x58535901)
      2. 4.2  Section Fill Command (0x5853590A)
      3. 4.3  Enable CRC Command (0x58535903)
      4. 4.4  Disable CRC Command (0x58535904)
      5. 4.5  Validate CRC Command (0x58535902)
      6. 4.6  Jump & Close Command (0x58535906)
      7. 4.7  Jump Command (0x58535905)
      8. 4.8  Sequential Read Enable Command (0x58535963)
      9. 4.9  Function Execute Command (0x5853590D)
      10. 4.10 Boot Table Command (0x58535907)
    6. AISgen: Tool to Generate Boot Script (AIS Image)
      1. 5.1 Installation
      2. 5.2 Getting Started
      3. 5.3 Generating AIS
        1. 5.3.1  Boot Mode and Boot Peripheral Setup
        2. 5.3.2  Phase-Locked Loop (PLL) Setup
        3. 5.3.3  Synchronous Dynamic Random Access Memory (SDRAM) Setup
        4. 5.3.4  DDR Setup
        5. 5.3.5  PSC Setup
        6. 5.3.6  Pin Multiplexing Setup
        7. 5.3.7  Application File Selection
        8. 5.3.8  AIS File Selection
        9. 5.3.9  Status and Messages
        10. 5.3.10 Additional AIS Options
          1. 5.3.10.1 CRC
          2. 5.3.10.2 Specifying the Application Entrypoint
        11. 5.3.11 Command Line Usage
    7. Master Boot – Booting From a Slave Memory Device
      1. 6.1 I2C EEPROM Boot
      2. 6.2 SPI EEPROM or Flash Boot
      3. 6.3 NOR Flash Boot
      4. 6.4 NAND Flash Boot
      5. 6.5 MMC/SD Boot
    8. Slave Boot – Booting From an External Master Host
      1. 7.1 About the AIS Interpreter on the Host
      2. 7.2 Start-Word Synchronization (SWS)
      3. 7.3 Ping Op-Code Synchronization (POS)
      4. 7.4 Opcode Synchronization (OS)
    9. UART Boot Host - Using Your PC as a UART Boot Master
      1. 8.1 Getting Started
      2. 8.2 Booting the Device
      3. 8.3 The AIS_Util.cs Source Code
    10. Boot Requirements, Constraints and Default Settings
      1. 9.1 General Comments
      2. 9.2 UART-Boot Modes
      3. 9.3 I2C-Boot Modes
      4. 9.4 SPI-Boot Modes
      5. 9.5 NOR-Boot Modes
      6. 9.6 NAND-Boot Modes
      7. 9.7 MMC/SD-Boot Modes
      8. 9.8 HPI-Boot Modes
    11. 10 References
  2.   A Boot Mode Selection Table
    1.     A.1 Boot Mode Selection Table
  3.   B Details of Supported NAND Devices
    1.     B.1 Details of Supported NAND Devices
  4.   C CRC Computation Algorithm
    1.     C.1 CRC Computation Algorithm
  5.   D Details of Pre-Defined ROM Functions
    1.     D.1 PLL0 Configuration (Index = 0, Argument Count = 2)
    2.     D.2 PLL1 Configuration (Index = 1, Argument Count = 2)
    3.     D.3 Clock Configuration (Index = 2, Argument Count = 1)
      1.      D.3.1 SPI Master Register
      2.      D.3.2 I2C Master Register
      3.      D.3.3 UART Slave Register
      4.      D.3.4 MMC/SD Register
    4.     D.4 mDDR/DDR2 Controller Configuration (Index = 3, Argument Count = 8)
    5.     D.5 EMIFA SDRAM Configuration (Index = 4, Argument Count = 5)
    6.     D.6 EMIFA Async Configuration (Index = 5, Argument Count = 5)
    7.     D.7 PLL and Clock Configuration (Index = 6, Argument Count = 3)
    8.     D.8 Power and Sleep Configuration (PSC) (Index = 7, Argument Count = 1)
    9.     D.9 Pinmux Configuration (Index = 8, Argument Count = 3)
  6.   E ROM Revision History
    1.     E.1 ROMID: D800K002, Silicon Revision 1.0
    2.     E.2 ROMID: D800K004, Silicon Revision 1.1
    3.     E.3 ROMID: D800K006, Silicon Revision 2.0
    4.     E.4 ROMID: D800K008, Silicon Revision 2.1
  7.   Revision History

CRC Computation Algorithm

The following code demonstrates calculation of the CRC as performed by the AIS generation script and the bootloader. This code should be used as a reference to implement CRC calculation on other platforms.

static Uint32 LOCAL_updateCRC (Uint8 *data_ptr, Uint32 section_size, Uint32 crc) { Uint32 i; // Prepare input to get back into calculation state (this means // initial input when starting fresh should be 0x00000000 ) crc = crc ^ 0xFFFFFFFF; // Perform the algorithm on each byte for (i = 0; i < section_size; i++) { crc = (crc >> 8) ^ CRC_Lut[(crc & 0xFF) ^ data_ptr[i]]; } // Exclusive OR the result with the specified value crc = (crc ^ 0xFFFFFFFF); return crc; }

This algorithm takes a lookup table (LUT) approach. The table consists of 256 32-bit values, which are given in Table 15.

Table 15. Lookup Table for CRC Algorithm

Index Word Index Word Index Word Index Word
1 0x00000000 65 0x76DC4190 129 0xEDB88320 193 0x9B64C2B0
2 0x77073096 66 0x01DB7106 130 0x9ABFB3B6 194 0xEC63F226
3 0xEE0E612C 67 0x98D220BC 131 0x03B6E20C 195 0x756AA39C
4 0x990951BA 68 0xEFD5102A 132 0x74B1D29A 196 0x026D930A
5 0x076DC419 69 0x71B18589 133 0xEAD54739 197 0x9C0906A9
6 0x706AF48F 70 0x06B6B51F 134 0x9DD277AF 198 0xEB0E363F
7 0xE963A535 71 0x9FBFE4A5 135 0x04DB2615 199 0x72076785
8 0x9E6495A3 72 0xE8B8D433 136 0x73DC1683 200 0x05005713
9 0x0EDB8832 73 0x7807C9A2 137 0xE3630B12 201 0x95BF4A82
10 0x79DCB8A4 74 0x0F00F934 138 0x94643B84 202 0xE2B87A14
11 0xE0D5E91E 75 0x9609A88E 139 0x0D6D6A3E 203 0x7BB12BAE
12 0x97D2D988 76 0xE10E9818 140 0x7A6A5AA8 204 0x0CB61B38
13 0x09B64C2B 77 0x7F6A0DBB 141 0xE40ECF0B 205 0x92D28E9B
14 0x7EB17CBD 78 0x086D3D2D 142 0x9309FF9D 206 0xE5D5BE0D
15 0xE7B82D07 79 0x91646C97 143 0x0A00AE27 207 0x7CDCEFB7
16 0x90BF1D91 80 0xE6635C01 144 0x7D079EB1 208 0x0BDBDF21
17 0x1DB71064 81 0x6B6B51F4 145 0xF00F9344 209 0x86D3D2D4
18 0x6AB020F2 82 0x1C6C6162 146 0x8708A3D2 210 0xF1D4E242
19 0xF3B97148 83 0x856530D8 147 0x1E01F268 211 0x68DDB3F8
20 0x84BE41DE 84 0xF262004E 148 0x6906C2FE 212 0x1FDA836E
21 0x1ADAD47D 85 0x6C0695ED 149 0xF762575D 213 0x81BE16CD
22 0x6DDDE4EB 86 0x1B01A57B 150 0x806567CB 214 0xF6B9265B
23 0xF4D4B551 87 0x8208F4C1 151 0x196C3671 215 0x6FB077E1
24 0x83D385C7 88 0xF50FC457 152 0x6E6B06E7 216 0x18B74777
25 0x136C9856 89 0x65B0D9C6 153 0xFED41B76 217 0x88085AE6
26 0x646BA8C0 90 0x12B7E950 154 0x89D32BE0 218 0xFF0F6A70
27 0xFD62F97A 91 0x8BBEB8EA 155 0x10DA7A5A 219 0x66063BCA
28 0x8A65C9EC 92 0xFCB9887C 156 0x67DD4ACC 220 0x11010B5C
29 0x14015C4F 93 0x62DD1DDF 157 0xF9B9DF6F 221 0x8F659EFF
30 0x63066CD9 94 0x15DA2D49 158 0x8EBEEFF9 222 0xF862AE69
31 0xFA0F3D63 95 0x8CD37CF3 159 0x17B7BE43 223 0x616BFFD3
32 0x8D080DF5 96 0xFBD44C65 160 0x60B08ED5 224 0x166CCF45
33 0x3B6E20C8 97 0x4DB26158 161 0xD6D6A3E8 225 0xA00AE278
34 0x4C69105E 98 0x3AB551CE 162 0xA1D1937E 226 0xD70DD2EE
35 0xD56041E4 99 0xA3BC0074 163 0x38D8C2C4 227 0x4E048354
36 0xA2677172 100 0xD4BB30E2 164 0x4FDFF252 228 0x3903B3C2
37 0x3C03E4D1 101 0x4ADFA541 165 0xD1BB67F1 229 0xA7672661
38 0x4B04D447 102 0x3DD895D7 166 0xA6BC5767 230 0xD06016F7
39 0xD20D85FD 103 0xA4D1C46D 167 0x3FB506DD 231 0x4969474D
40 0xA50AB56B 104 0xD3D6F4FB 168 0x48B2364B 232 0x3E6E77DB
41 0x35B5A8FA 105 0x4369E96A 169 0xD80D2BDA 233 0xAED16A4A
42 0x42B2986C 106 0x346ED9FC 170 0xAF0A1B4C 234 0xD9D65ADC
43 0xDBBBC9D6 107 0xAD678846 171 0x36034AF6 235 0x40DF0B66
44 0xACBCF940 108 0xDA60B8D0 172 0x41047A60 236 0x37D83BF0
45 0x32D86CE3 109 0x44042D73 173 0xDF60EFC3 237 0xA9BCAE53
46 0x45DF5C75 110 0x33031DE5 174 0xA867DF55 238 0xDEBB9EC5
47 0xDCD60DCF 111 0xAA0A4C5F 175 0x316E8EEF 239 0x47B2CF7F
48 0xABD13D59 112 0xDD0D7CC9 176 0x4669BE79 240 0x30B5FFE9
49 0x26D930AC 113 0x5005713C 177 0xCB61B38C 241 0xBDBDF21C
50 0x51DE003A 114 0x270241AA 178 0xBC66831A 242 0xCABAC28A
51 0xC8D75180 115 0xBE0B1010 179 0x256FD2A0 243 0x53B39330
52 0xBFD06116 116 0xC90C2086 180 0x5268E236 244 0x24B4A3A6
53 0x21B4F4B5 117 0x5768B525 181 0xCC0C7795 245 0xBAD03605
54 0x56B3C423 118 0x206F85B3 182 0xBB0B4703 246 0xCDD70693
55 0xCFBA9599 119 0xB966D409 183 0x220216B9 247 0x54DE5729
56 0xB8BDA50F 120 0xCE61E49F 184 0x5505262F 248 0x23D967BF
57 0x2802B89E 121 0x5EDEF90E 185 0xC5BA3BBE 249 0xB3667A2E
58 0x5F058808 122 0x29D9C998 186 0xB2BD0B28 250 0xC4614AB8
59 0xC60CD9B2 123 0xB0D09822 187 0x2BB45A92 251 0x5D681B02
60 0xB10BE924 124 0xC7D7A8B4 188 0x5CB36A04 252 0x2A6F2B94
61 0x2F6F7C87 125 0x59B33D17 189 0xC2D7FFA7 253 0xB40BBE37
62 0x58684C11 126 0x2EB40D81 190 0xB5D0CF31 254 0xC30C8EA1
63 0xC1611DAB 127 0xB7BD5C3B 191 0x2CD99E8B 255 0x5A05DF1B
64 0xB6662D3D 128 0xC0BA6CAD 192 0x5BDEAE1D 256 0x2D02EF8D