SPRABA5D January 2014 – January 2019 AM1802 , AM1802 , AM1806 , AM1806 , AM1808 , AM1808 , AM1810 , AM1810
The mDDR/DDR2 controller configuration function configures the mDDR/DDR2 registers responsible for DDR timing and configuration. Since the mDDR/DDR2 controller setup requires that the PLL1 is configured, the PLL1 configuration function is called before the mDDR/DDR2 controller itself is initialized. Therefore, the first two arguments are the same as required for the PLL1 configuration function.
The next five arguments are required timing parameters for the mDDR/DDR2 Controller registers. They are written directly to mDDR/DDR2 controller registers with the same names.
The last argument contains three fields: PASR, ROWSIZE, and CLK2XSRC. The first two fields are copied to fields with the same names in the SDCR2 register if and only if MSDRAMEN of SDCR (bit 25 of Arg4) = 1. In other words, these fields only apply when using mDDR, not DDR2. The third field applies in all cases and allows selection of the clock source for the mDDR/DDR2 controller. A value of zero uses the normal clock source, while a value of one selects an un-divided clock that is typically twice as fast. (More precisely, it ignores the PLL1 post divider.)
| 31 | 19 | 18 | 16 | 15 | 11 | 10 | 8 | 7 | 0 |
| Arg1 | PLL1 Configuration Arg1 | |||||||||||||||||||||||||||||||
| Arg2 | PLL1 Configuration Arg2 | |||||||||||||||||||||||||||||||
| Arg3 | DRPYC1R | |||||||||||||||||||||||||||||||
| Arg4 | SDCR | |||||||||||||||||||||||||||||||
| Arg5 | SDTIMR1 | |||||||||||||||||||||||||||||||
| Arg6 | SDTIMR2 | |||||||||||||||||||||||||||||||
| Arg7 | SDRCR | |||||||||||||||||||||||||||||||
| Arg8 | Reserved | PASR | Reserved | ROWSIZE | CLK2XSRC | |||||||||||||||||||||||||||
The mDDR/DDR2 Controller Configuration function wakes up the mDDR/DDR2 peripheral from its default reset state and correctly applies the register configurations as required.
NOTE
For devices with ROM revision d800k002, this function supports only DDR2, not mDDR. When creating AIS files for this version of the bootloader, the AISgen tool uses a software patch to configure mDDR as required. Subsequent ROM revisions (e.g., d800k004 and later) apply mDDR configuration using the up-to-date ROM function. For this reason, it’s important to specify the correct ROM ID in the AISgen tool when configuring mDDR/DDR2.
AIS files generated for the d800k002 ROM revision will still work with later revisions of the ROM, but AIS files created for later revisions may not work with d800k002 devices.