SPRACK9 February   2019 AM1705 , AM1707 , AM1806 , AM1808 , OMAP-L132 , OMAP-L137 , OMAP-L138 , TMS320C6742 , TMS320C6745 , TMS320C6746 , TMS320C6747 , TMS320C6748

 

  1.   OMAP-L13x/C674x/AM1x schematic review guidelines
    1.     Trademarks
    2. 1 Introduction
    3. 2 Recommendations Specific to OMAP-L1x/TMS320C674x/AM1x
      1. 2.1 EVM vs Data Sheet
      2. 2.2 Before You Begin
        1. 2.2.1 Documentation
        2. 2.2.2 Pinout
      3. 2.3 Critical Connections
        1. 2.3.1 Decoupling capacitors
        2. 2.3.2 Power
        3. 2.3.3 Ground
        4. 2.3.4 Clocking
        5. 2.3.5 Reset
        6. 2.3.6 Boot
        7. 2.3.7 Pin multiplexing
        8. 2.3.8 Debug
      4. 2.4 Peripherals
        1. 2.4.1 UART
        2. 2.4.2 EMAC
        3. 2.4.3 MMC/SD
        4. 2.4.4 EMIF
          1. 2.4.4.1 NAND
          2. 2.4.4.2 NOR
          3. 2.4.4.3 DDR2/mDDR
        5. 2.4.5 SPI
        6. 2.4.6 I2C
        7. 2.4.7 McASP
          1. 2.4.7.1 Audio
        8. 2.4.8 USB
          1. 2.4.8.1 USB0 (USB 2.0 OTG)
          2. 2.4.8.2 USB1 (USB 1.1 OHCI)
          3. 2.4.8.3 Unused USB pins
          4. 2.4.8.4 USB Board Design Guidelines
            1. 2.4.8.4.1 Cautionary note - USB PHY off while host is still powered on
        9. 2.4.9 Other
          1. 2.4.9.1 Signal Visibility
          2. 2.4.9.2 Voltage Level Changes
          3. 2.4.9.3 Signal Terminations
          4. 2.4.9.4 Ground Symbols
          5. 2.4.9.5 Power Symbols
    4. 3 BGA PCB Design
    5. 4 Power Management Solutions
    6. 5 References
  2.   A XDS Connector Design Checklist
    1.     A.1 XDS Connector Design
  3.   B Connecting NOR Flash to OMAP-L138
    1.     B.1 Connecting Memory Devices <32 MB
    2.     B.2 Connecting Memory Devices >32 MB

USB Board Design Guidelines

General routing and placement guidelines for USB interfaces:

  1. Place the USB PHY and major components on the un-routed board first.
  2. Route the high-speed clock and high-speed USB differential signals with minimal trace lengths.
  3. Route the high-speed USB signals on the plane closest to the ground plane, whenever possible.
  4. Route the high-speed USB signals using a minimum of vias and corners. This reduces signal reflections and impedance changes.
  5. When it becomes necessary to turn 90°, use two 45° turns or an arc instead of making a single 90° turn. This reduces reflections on the signal traces by minimizing impedance discontinuities.
  6. Do not route USB traces under or near crystals, oscillators, clock signal generators, switching regulators, mounting holes, magnetic devices or IC’s that use or duplicate clock signals.
  7. Avoid stubs on the high-speed USB signals because they cause signal reflections. If a stub is unavoidable, then the stub should be less than 200 mils.
  8. Route all high-speed USB signal traces over continuous planes (VCC or GND), with no interruptions. Avoid crossing over anti-etch, commonly found with plane splits.

Note that USB supports hot insertion and removal, so it is very vulnerable to ESD resulting from this. External ESD protection like the TPD2E001 or TPD3E001 is recommended. For USB OTG, the recommended ESD protection is the TPD4S012. Any USB 2.0 certified ESD protection chip is acceptable as long as the USB PCB routing guidelines are followed.

For in-depth details, see the High-speed interface layout guidelines.