SPRACM7 December 2020 F29H850TU , F29H859TU-Q1 , TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1 , TMS320F28384D , TMS320F28384D-Q1 , TMS320F28384S , TMS320F28384S-Q1 , TMS320F28386D , TMS320F28386D-Q1 , TMS320F28386S , TMS320F28386S-Q1 , TMS320F28388D , TMS320F28388S , TMS320F28P550SJ , TMS320F28P559SJ-Q1 , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P659DH-Q1 , TMS320F28P659DK-Q1 , TMS320F28P659SH-Q1
In addition to monitoring the critical CPU interfaces, monitoring various events in the system like interrupts and peripheral activity is another important requirement for any real-time system. All the key system events like interrupts, DMA triggers and important peripheral events are brought into the ERAD IP. Hence, these can be time-stamped, counted and measured with relation to the CPU activity. Using state machines in CLB, it is possible to further define sequences of operations and events. Counter block allows the system events, as well as CPU activity, to be measured and analyzed with reference to other events, too.
Simple examples of linking CPU activity and system events are:
Counter supports a unique start stop mode, where in counter records the CPU cycles spent between any start and stop event. Moreover there is additional hardware which continuously keeps a record of the maximum count value reached by this counter across multiple start/stop iterations. Importantly, all the above mentioned metrics are achieved with zero software overhead.
Some of the unique benefits rendered by this counter are:
List of events that can be profiled by SEC (F28004x) are: