SPRACO3 October   2019 INA240 , LMG5200 , TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377D-EP , TMS320F28377D-Q1 , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28378D , TMS320F28378S , TMS320F28379D , TMS320F28379D-Q1 , TMS320F28379S

 

  1.   Dual-Axis Motor Control Using FCL and SFRA On a Single C2000 MCU
    1.     Trademarks
    2. 1 Introduction
      1. 1.1 Acronyms and Descriptions
    3. 2 Benefits of the C2000 for High-Bandwidth Current Loop
    4. 3 Current Loops in Servo Drives
    5. 4 PWM Update Latency for Dual Motor
    6. 5 Outline of the Fast Current Loop Library
    7. 6 Evaluation Platform Setup
      1. 6.1 Hardware
        1. 6.1.1 LAUNCHXL-F28379D or LAUNCHXL-F280049C
          1. 6.1.1.1 DACs
          2. 6.1.1.2 QEPs
        2. 6.1.2 Inverter BoosterPack - GaN + INA240
        3. 6.1.3 Two Motor Dyno
        4. 6.1.4 System Hardware Connections
        5. 6.1.5 Powering Up the Setup
      2. 6.2 Software
        1. 6.2.1 Incremental Build
        2. 6.2.2 Software Setup for Dual-Axis Servo Drive Projects
    8. 7 System Software Integration and Testing
      1. 7.1 Incremental Build Level 1
        1. 7.1.1 SVGEN Test
        2. 7.1.2 Testing SVGEN With DACs
        3. 7.1.3 Inverter Functionality Verification
      2. 7.2 Incremental Build Level 2
        1. 7.2.1 Connecting motor to INVs
        2. 7.2.2 Testing the Motors and INVs
        3. 7.2.3 Setting Over-current Limit in the Software
        4. 7.2.4 Setting Current Regulator Limits
        5. 7.2.5 Position Encoder Feedback
      3. 7.3 Incremental Build Level 3
        1. 7.3.1 Observation One – Latency
      4. 7.4 Incremental Build Level 4
        1. 7.4.1 Observation
        2. 7.4.2 Dual Motor Run With Speed Loop
      5. 7.5 Incremental Build Level 5
        1. 7.5.1 Dual Motor Run with Position Loop
      6. 7.6 Incremental Build Level 6
        1. 7.6.1 Integrating SFRA Library
        2. 7.6.2 Initial Setup Before Starting SFRA
        3. 7.6.3 SFRA GUIs
        4. 7.6.4 Setting Up the GUIs to Connect to Target Platform
        5. 7.6.5 Running the SFRA GUIs
        6. 7.6.6 Influence of Current Feedback SNR
        7. 7.6.7 Inferences
        8. 7.6.8 Phase Margin vs Gain Crossover Frequency
    9. 8 Summary
    10. 9 References

7.6.1 Integrating SFRA Library

The SFRA tool runs only on C2000 MCU platform to study the frequency response analysis of any control loop that it controls. It consists of an embedded firmware part that runs on the MCU and a graphical user interface part (GUI) that runs on the development computer.

C2000™ Software Frequency Response Analyzer (SFRA) Library and Compensation Designer in SDK Framework describes the SFRA tool and guides you into integrating it into the C2000 platform. This can be found at: \ti\c2000\C2000Ware_MotorControl_SDK_<version>\libraries\sfra\Doc.

The embedded firmware is available as a library in the MotorControl SDK at: \ti\c2000\C2000Ware_MotorControl_SDK_<version>\libraries\sfra

The SFRA GUIs are available as executable applications in the MotorControl SDK at: \ti\c2000\C2000Ware_MotorControl_SDK_<version>\libraries\sfra\gui

Some example projects to understand SFRA are available at: \ti\c2000\C2000Ware_MotorControl_SDK_<version>\libraries\sfra\examples

In the ISR code, there are two functions as follows that inject noise for SFRA and then collect the feedback data from the loop.

  • injectSFRA()
  • collectSFRA()

The roles of these functions are self-explanatory from their names. They should be used in the code to collect the data in right sequence.

NOTE

  • The disturbances due to analog signal path and quantization will impact the loop performance and hinder high bandwidth selections that can be verified using SFRA results. Therefore it is important to provide a current feedback with a higher SNR.
  • When evaluating current loops, if it is possible to hold the motor speed constant, it will help to minimize the impact of speed jitter related errors in the SFRA results. This is particularly useful when studying the Iq loop. If the voltage decoupling of current loop is good, then this requirement may not matter.

This tool provides the ability to study the D-axis or Q-axis current loops or the speed loop. The motor can be run at different speed / load conditions and at different bandwidths and the performance can be evaluated at each of these conditions. It can be seen that the controller can provide the designed bandwidth under all these conditions with a certain tolerance.

The implementation block diagram is given in Figure 32. The SFRA tool injects noise signal into the system at various frequencies and analyzes the system response and provides a Bode Plot of the actual physical system as seen during the test.

figure_32.gifFigure 32. Level 6 Block Diagram With Inner FCL and SFRA
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