SPRACU7A December   2020  – March 2021 TDA4VM , TDA4VM-Q1

 

  1.   Trademarks
  2. 1 Introduction
  3. 2 Getting Started
    1. 2.1 Hardware Requirements
    2. 2.2 Software Requirements
    3. 2.3 Lab Requirements
  4. 3 IQ Tuning Prerequisites
    1. 3.1 Requirements for Tuning on Target
    2. 3.2 Requirements for Tuning on Simulator
  5. 4 VPAC Overview
    1. 4.1 Block Diagram
    2. 4.2 IP Overview
      1. 4.2.1 Lens Distortion Correction (LDC)
        1. 4.2.1.1 Features
      2. 4.2.2 Bilateral Noise Filter (BNF)
        1. 4.2.2.1 Features
      3. 4.2.3 Multi Scalar (MSC)
      4. 4.2.4 Vision Imaging Subsystem (VISS)
      5. 4.2.5 Subblocks
        1. 4.2.5.1 Raw Front End (RAWFE)
          1. 4.2.5.1.1 WDR Decompanding
          2. 4.2.5.1.2 WDR Merge
          3. 4.2.5.1.3 Defect Pixel Correction (DPC)
          4. 4.2.5.1.4 Lens Shading Correction (LSC)
          5. 4.2.5.1.5 Hardware 3A (H3A)
          6. 4.2.5.1.6 White Balance (WB)
        2. 4.2.5.2 NSF4 – 4th Generation Noise Filter
        3. 4.2.5.3 Global and Local Brightness Contrast Enhancement (GLBCE)
        4. 4.2.5.4 Flexible Color Processing (FCP)
  6. 5 Dataflow
  7. 6 IQ Tuning Process
    1. 6.1 Expectations of the Tool
      1. 6.1.1 User Expertise
      2. 6.1.2 Ease of Use
      3. 6.1.3 Troubleshooting
  8. 7 Imaging Software Architecture
    1. 7.1 Auto White Balance
    2. 7.2 AutoExposure
    3. 7.3 Dynamic Camera Configuration (DCC) Algorithm
  9. 8 Computing Tuning Parameters
  10. 9 Testing Tuning Parameters
    1. 9.1 On Target Platform – Compile Time Update
    2. 9.2 On Target Platform – Run Time Update From File System
  11. 10Live Tuning
    1. 10.1 Supported Features
      1. 10.1.1 RAW Capture
      2. 10.1.2 YUV Capture
      3. 10.1.3 AutoExposure Control
      4. 10.1.4 AutoWhiteBalance Control
      5. 10.1.5 Sensor Register Read/Write
      6. 10.1.6 Live DCC Update
        1. 10.1.6.1 Update Single Plugin
        2. 10.1.6.2 Update Multiple Plugins
  12. 11Revision History

1 Introduction

The camera imager is a sensor that converts light into a digital signal, which can be used to represent an image. However, the image generated by an image sensor is in a format not suitable to be consumed directly by humans or machines. The sensor output has many defects that must be fixed to make the image visually appealing or compatible with computer vision or deep-learning systems. This is achieved by an Image Signal Processor (ISP).

Jacinto 7 processors come equipped with hardware accelerated ISP called Vision Preprocessing ACcelerator (VPAC). VPAC is responsible for end-to-end image processing and is designed to be software configurable to support a wide range of image sensors.

Every image sensor has a different response to light. Therefore, the VPAC parameters must be computed uniquely for every sensor. This process is called Image Quality (IQ) tuning. Texas Instruments (TI) provides a PC based tool that allows customers to accomplish IQ tuning with a user friendly interface.

Tuned parameters thus computed must be written to VPAC Memory Mapped Registers (MMRs). This is achieved through changing the Dynamic Camera Configuration (DCC) software library in imaging component of J7 Software Development Kit https://www.ti.com/tool/download/PROCESSOR-SDK-RTOS-J721E.
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