SPRACZ5 December 2021 DRA821U , DRA821U-Q1 , DRA829J , DRA829J-Q1 , DRA829V , DRA829V-Q1 , TDA4VM , TDA4VM-Q1
Original state of PCIe instances on 7.3:
root@j7-evm:~# k3conf dump device 239
|-----------------------------------------------|
| Device ID | Device Name | Device Status |
|-----------------------------------------------|
| 239 | J721E_DEV_PCIE0 | DEVICE_STATE_ON |
|-----------------------------------------------|
root@j7-evm:~# k3conf dump device 240
|-----------------------------------------------|
| Device ID | Device Name | Device Status |
|-----------------------------------------------|
| 240 | J721E_DEV_PCIE1 | DEVICE_STATE_ON |
|-----------------------------------------------|
root@j7-evm:~# k3conf dump device 241
|-----------------------------------------------|
| Device ID | Device Name | Device Status |
|-----------------------------------------------|
| 241 | J721E_DEV_PCIE2 | DEVICE_STATE_ON |
|-----------------------------------------------|
root@j7-evm:~# k3conf dump device 242
|-----------------------------------------------|
| Device ID | Device Name | Device Status |
|-----------------------------------------------|
| 242 | J721E_DEV_PCIE3 | DEVICE_STATE_ON |
|-----------------------------------------------|All of them are enabled in Linux. The Linux DTS patch needs to be disabled on all the PCIe instances:
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
index 0fee2285a..4744053f4 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
@@ -957,56 +957,6 @@
};
};
-&pcie0_rc {
- reset-gpios = <&exp1 6 GPIO_ACTIVE_HIGH>;
- phys = <&serdes0_pcie_link>;
- phy-names = "pcie_phy";
- num-lanes = <1>;
-};
-
-&pcie1_rc {
- reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>;
- phys = <&serdes1_pcie_link>;
- phy-names = "pcie_phy";
- num-lanes = <2>;
-};
-
-&pcie2_rc {
- reset-gpios = <&exp2 20 GPIO_ACTIVE_HIGH>;
- phys = <&serdes2_pcie_link>;
- phy-names = "pcie_phy";
- num-lanes = <2>;
-};
-
-&pcie0_ep {
- phys = <&serdes0_pcie_link>;
- phy-names = "pcie_phy";
- num-lanes = <1>;
- status = "disabled";
-};
-
-&pcie1_ep {
- phys = <&serdes1_pcie_link>;
- phy-names = "pcie_phy";
- num-lanes = <2>;
- status = "disabled";
-};
-
-&pcie2_ep {
- phys = <&serdes2_pcie_link>;
- phy-names = "pcie_phy";
- num-lanes = <2>;
- status = "disabled";
-};
-
-&pcie3_rc {
- status = "disabled";
-};
-
-&pcie3_ep {
- status = "disabled";
-};
-
&usb_serdes_mux {
idle-states = <1>, <0>; /* USB0 to SERDES3, USB1 to SERDES1 */
};
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index 2f756a048..11fea9d36 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -649,243 +649,6 @@
};
};
- pcie0_rc: pcie@2900000 {
- compatible = "ti,j721e-pcie-host";
- reg = <0x00 0x02900000 0x00 0x1000>,
- <0x00 0x02907000 0x00 0x400>,
- <0x00 0x0d000000 0x00 0x00800000>,
- <0x00 0x10000000 0x00 0x00001000>;
- reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
- ti,syscon-pcie-ctrl = <&pcie0_ctrl>;
- max-link-speed = <3>;
- num-lanes = <2>;
- power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 239 1>;
- clock-names = "fck";
- #address-cells = <3>;
- #size-cells = <2>;
- bus-range = <0x0 0xf>;
- cdns,max-outbound-regions = <32>;
- cdns,no-bar-match-nbits = <64>;
- vendor-id = /bits/ 16 <0x104c>;
- device-id = /bits/ 16 <0xb00d>;
- msi-map = <0x0 &gic_its 0x0 0x10000>;
- dma-coherent;
- ranges = <0x01000000 0x0 0x10001000 0x00 0x10001000 0x0 0x0010000>,
- <0x02000000 0x0 0x10011000 0x00 0x10011000 0x0 0x7fef000>;
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0 0 0 1 &pcie0_intc 0>, /* INT A */
- <0 0 0 2 &pcie0_intc 0>, /* INT B */
- <0 0 0 3 &pcie0_intc 0>, /* INT C */
- <0 0 0 4 &pcie0_intc 0>; /* INT D */
-
- pcie0_intc: legacy-interrupt-controller {
- interrupt-controller;
- #interrupt-cells = <1>;
- interrupt-parent = <&gic500>;
- interrupts = <GIC_SPI 312 IRQ_TYPE_EDGE_RISING>;
- };
- };
-
- pcie0_ep: pcie-ep@2900000 {
- compatible = "ti,j721e-pcie-ep";
- reg = <0x00 0x02900000 0x00 0x1000>,
- <0x00 0x02907000 0x00 0x400>,
- <0x00 0x0d000000 0x00 0x00800000>,
- <0x00 0x10000000 0x00 0x08000000>;
- reg-names = "intd_cfg", "user_cfg", "reg", "mem";
- ti,syscon-pcie-ctrl = <&pcie0_ctrl>;
- max-link-speed = <3>;
- num-lanes = <2>;
- power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 239 1>;
- clock-names = "fck";
- cdns,max-outbound-regions = <32>;
- max-functions = /bits/ 8 <6>;
- max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>;
- dma-coherent;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- };
-
- pcie1_rc: pcie@2910000 {
- compatible = "ti,j721e-pcie-host";
- reg = <0x00 0x02910000 0x00 0x1000>,
- <0x00 0x02917000 0x00 0x400>,
- <0x00 0x0d800000 0x00 0x00800000>,
- <0x00 0x18000000 0x00 0x00001000>;
- reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
- ti,syscon-pcie-ctrl = <&pcie1_ctrl>;
- max-link-speed = <3>;
- num-lanes = <2>;
- power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 240 1>;
- clock-names = "fck";
- #address-cells = <3>;
- #size-cells = <2>;
- bus-range = <0x0 0xf>;
- cdns,max-outbound-regions = <32>;
- cdns,no-bar-match-nbits = <64>;
- vendor-id = /bits/ 16 <0x104c>;
- device-id = /bits/ 16 <0xb00d>;
- msi-map = <0x0 &gic_its 0x10000 0x10000>;
- dma-coherent;
- ranges = <0x01000000 0x0 0x18001000 0x00 0x18001000 0x0 0x0010000>,
- <0x02000000 0x0 0x18011000 0x00 0x18011000 0x0 0x7fef000>;
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0 0 0 1 &pcie1_intc 0>, /* INT A */
- <0 0 0 2 &pcie1_intc 0>, /* INT B */
- <0 0 0 3 &pcie1_intc 0>, /* INT C */
- <0 0 0 4 &pcie1_intc 0>; /* INT D */
-
- pcie1_intc: legacy-interrupt-controller {
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupt-parent = <&gic500>;
- interrupts = <GIC_SPI 324 IRQ_TYPE_EDGE_RISING>;
- };
- };
-
- pcie1_ep: pcie-ep@2910000 {
- compatible = "ti,j721e-pcie-ep";
- reg = <0x00 0x02910000 0x00 0x1000>,
- <0x00 0x02917000 0x00 0x400>,
- <0x00 0x0d800000 0x00 0x00800000>,
- <0x00 0x18000000 0x00 0x08000000>;
- reg-names = "intd_cfg", "user_cfg", "reg", "mem";
- ti,syscon-pcie-ctrl = <&pcie1_ctrl>;
- max-link-speed = <3>;
- num-lanes = <2>;
- power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 240 1>;
- clock-names = "fck";
- cdns,max-outbound-regions = <32>;
- max-functions = /bits/ 8 <6>;
- max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>;
- dma-coherent;
- };
-
- pcie2_rc: pcie@2920000 {
- compatible = "ti,j721e-pcie-host";
- reg = <0x00 0x02920000 0x00 0x1000>,
- <0x00 0x02927000 0x00 0x400>,
- <0x00 0x0e000000 0x00 0x00800000>,
- <0x44 0x00000000 0x00 0x00001000>;
- reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
- ti,syscon-pcie-ctrl = <&pcie2_ctrl>;
- max-link-speed = <3>;
- num-lanes = <2>;
- power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 241 1>;
- clock-names = "fck";
- #address-cells = <3>;
- #size-cells = <2>;
- bus-range = <0x0 0xf>;
- cdns,max-outbound-regions = <32>;
- cdns,no-bar-match-nbits = <64>;
- vendor-id = /bits/ 16 <0x104c>;
- device-id = /bits/ 16 <0xb00d>;
- msi-map = <0x0 &gic_its 0x20000 0x10000>;
- dma-coherent;
- ranges = <0x01000000 0x00 0x00001000 0x44 0x00001000 0x0 0x0010000>,
- <0x02000000 0x00 0x00011000 0x44 0x00011000 0x0 0x7fef000>;
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0 0 0 1 &pcie2_intc 0>, /* INT A */
- <0 0 0 2 &pcie2_intc 0>, /* INT B */
- <0 0 0 3 &pcie2_intc 0>, /* INT C */
- <0 0 0 4 &pcie2_intc 0>; /* INT D */
-
- pcie2_intc: legacy-interrupt-controller {
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupt-parent = <&gic500>;
- interrupts = <GIC_SPI 336 IRQ_TYPE_EDGE_RISING>;
- };
- };
-
- pcie2_ep: pcie-ep@2920000 {
- compatible = "ti,j721e-pcie-ep";
- reg = <0x00 0x02920000 0x00 0x1000>,
- <0x00 0x02927000 0x00 0x400>,
- <0x00 0x0e000000 0x00 0x00800000>,
- <0x44 0x00000000 0x00 0x08000000>;
- reg-names = "intd_cfg", "user_cfg", "reg", "mem";
- ti,syscon-pcie-ctrl = <&pcie2_ctrl>;
- max-link-speed = <3>;
- num-lanes = <2>;
- power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 241 1>;
- clock-names = "fck";
- cdns,max-outbound-regions = <32>;
- max-functions = /bits/ 8 <6>;
- max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>;
- dma-coherent;
- };
-
- pcie3_rc: pcie@2930000 {
- compatible = "ti,j721e-pcie-host";
- reg = <0x00 0x02930000 0x00 0x1000>,
- <0x00 0x02937000 0x00 0x400>,
- <0x00 0x0e800000 0x00 0x00800000>,
- <0x44 0x10000000 0x00 0x00001000>;
- reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
- ti,syscon-pcie-ctrl = <&pcie3_ctrl>;
- max-link-speed = <3>;
- num-lanes = <2>;
- power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 242 1>;
- clock-names = "fck";
- #address-cells = <3>;
- #size-cells = <2>;
- bus-range = <0x0 0xf>;
- cdns,max-outbound-regions = <32>;
- cdns,no-bar-match-nbits = <64>;
- vendor-id = /bits/ 16 <0x104c>;
- device-id = /bits/ 16 <0xb00d>;
- msi-map = <0x0 &gic_its 0x30000 0x10000>;
- dma-coherent;
- ranges = <0x01000000 0x00 0x00001000 0x44 0x10001000 0x0 0x0010000>,
- <0x02000000 0x00 0x00011000 0x44 0x10011000 0x0 0x7fef000>;
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0 0 0 1 &pcie3_intc 0>, /* INT A */
- <0 0 0 2 &pcie3_intc 0>, /* INT B */
- <0 0 0 3 &pcie3_intc 0>, /* INT C */
- <0 0 0 4 &pcie3_intc 0>; /* INT D */
-
- pcie3_intc: legacy-interrupt-controller {
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupt-parent = <&gic500>;
- interrupts = <GIC_SPI 348 IRQ_TYPE_EDGE_RISING>;
- };
- };
-
- pcie3_ep: pcie-ep@2930000 {
- compatible = "ti,j721e-pcie-ep";
- reg = <0x00 0x02930000 0x00 0x1000>,
- <0x00 0x02937000 0x00 0x400>,
- <0x00 0x0e800000 0x00 0x00800000>,
- <0x44 0x10000000 0x00 0x08000000>;
- reg-names = "intd_cfg", "user_cfg", "reg", "mem";
- ti,syscon-pcie-ctrl = <&pcie3_ctrl>;
- max-link-speed = <3>;
- num-lanes = <2>;
- power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 242 1>;
- clock-names = "fck";
- cdns,max-outbound-regions = <32>;
- max-functions = /bits/ 8 <6>;
- max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>;
- dma-coherent;
- #address-cells = <2>;
- #size-cells = <2>;
- };
-
serdes_wiz4: wiz@5050000 {
compatible = "ti,j721e-wiz-10g";After the above diff patch is applied on Linux dts, the dtb is recompiled and copied over to the SD Card:
To check if the above action has taken effect, run the k3conf commands:
k3conf dump device 'x'replace x with the device ID to be checked.
Sample output for various PCIe devices:
root@j7-evm:~# k3conf dump device 239
|------------------------------------------------|
| Device ID | Device Name | Device Status |
|------------------------------------------------|
| 239 | J721E_DEV_PCIE0 | DEVICE_STATE_OFF |
|------------------------------------------------|
root@j7-evm:~# k3conf dump device 240
|------------------------------------------------|
| Device ID | Device Name | Device Status |
|------------------------------------------------|
| 240 | J721E_DEV_PCIE1 | DEVICE_STATE_OFF |
|------------------------------------------------|
root@j7-evm:~# k3conf dump device 241
|------------------------------------------------|
| Device ID | Device Name | Device Status |
|------------------------------------------------|
| 241 | J721E_DEV_PCIE2 | DEVICE_STATE_OFF |
|------------------------------------------------|
root@j7-evm:~# k3conf dump device 242
|------------------------------------------------|
| Device ID | Device Name | Device Status |
|------------------------------------------------|
| 242 | J721E_DEV_PCIE3 | DEVICE_STATE_OFF |
|------------------------------------------------|Modules that are enabled at u-boot need to be disabled at u-boot device tree. Sample patch for disabling modules at u-boot is here: .
From bc56b43cd2ebfd8423a815016d78d0f02cedc58d Mon Sep 17 00:00:00 2001
From: Keerthy <j-keerthy@ti.com>
Date: Thu, 21 Jan 2021 14:09:39 +0530
Subject: [PATCH] arm: dts: k3-j721e: Remove unused nodes
Remove unused nodes
Signed-off-by: Keerthy <j-keerthy@ti.com>
---
.../k3-j721e-common-proc-board-u-boot.dtsi | 10 --
arch/arm/dts/k3-j721e-common-proc-board.dts | 26 ----
arch/arm/dts/k3-j721e-main.dtsi | 132 ------------------
.../arm/dts/k3-j721e-r5-common-proc-board.dts | 11 --
arch/arm/dts/k3-j721e-tps65917-proc-board.dts | 8 --
5 files changed, 187 deletions(-)
Index: u-boot-2020.01+gitAUTOINC+2781231a33-g2781231a33/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
===================================================================
--- u-boot-2020.01+gitAUTOINC+2781231a33-g2781231a33.orig/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
+++ u-boot-2020.01+gitAUTOINC+2781231a33-g2781231a33/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
@@ -146,16 +146,6 @@
u-boot,dm-spl;
};
-&usbss0 {
- u-boot,dm-spl;
- ti,usb2-only;
-};
-
-&usb0 {
- dr_mode = "peripheral";
- u-boot,dm-spl;
-};
-
&mcu_cpsw {
pinctrl-names = "default";
pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
Index: u-boot-2020.01+gitAUTOINC+2781231a33-g2781231a33/arch/arm/dts/k3-j721e-common-proc-board.dts
===================================================================
--- u-boot-2020.01+gitAUTOINC+2781231a33-g2781231a33.orig/arch/arm/dts/k3-j721e-common-proc-board.dts
+++ u-boot-2020.01+gitAUTOINC+2781231a33-g2781231a33/arch/arm/dts/k3-j721e-common-proc-board.dts
@@ -19,8 +19,6 @@
remoteproc1 = &mcu_r5fss0_core1;
remoteproc2 = &main_r5fss0_core0;
remoteproc3 = &main_r5fss0_core1;
- remoteproc4 = &main_r5fss1_core0;
- remoteproc5 = &main_r5fss1_core1;
remoteproc6 = &c66_0;
remoteproc7 = &c66_1;
remoteproc8 = &c71_0;
@@ -216,30 +214,6 @@
clock-frequency = <400000>;
};
-&usbss0 {
- pinctrl-names = "default";
- pinctrl-0 = <&main_usbss0_pins_default>;
- ti,vbus-divider;
-};
-
-&usb0 {
- dr_mode = "otg";
- maximum-speed = "super-speed";
- phys = <&serdes3_usb_link>;
- phy-names = "cdns3,usb3-phy";
-};
-
-&usbss1 {
- pinctrl-names = "default";
- pinctrl-0 = <&main_usbss1_pins_default>;
- ti,usb2-only;
-};
-
-&usb1 {
- dr_mode = "host";
- maximum-speed = "high-speed";
-};
-
&main_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default>;
Index: u-boot-2020.01+gitAUTOINC+2781231a33-g2781231a33/arch/arm/dts/k3-j721e-main.dtsi
===================================================================
--- u-boot-2020.01+gitAUTOINC+2781231a33-g2781231a33.orig/arch/arm/dts/k3-j721e-main.dtsi
+++ u-boot-2020.01+gitAUTOINC+2781231a33-g2781231a33/arch/arm/dts/k3-j721e-main.dtsi
@@ -434,44 +434,6 @@
};
};
- main_r5fss1: r5fss@5e00000 {
- compatible = "ti,j721e-r5fss";
- lockstep-mode = <0>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x5e00000 0x00 0x5e00000 0x20000>,
- <0x5f00000 0x00 0x5f00000 0x20000>;
- power-domains = <&k3_pds 244 TI_SCI_PD_EXCLUSIVE>;
-
- main_r5fss1_core0: r5f@5e00000 {
- compatible = "ti,j721e-r5f";
- reg = <0x5e00000 0x00008000>,
- <0x5e10000 0x00008000>;
- reg-names = "atcm", "btcm";
- ti,sci = <&dmsc>;
- ti,sci-dev-id = <247>;
- ti,sci-proc-ids = <0x08 0xFF>;
- resets = <&k3_reset 247 1>;
- atcm-enable = <1>;
- btcm-enable = <1>;
- loczrama = <1>;
- };
-
- main_r5fss1_core1: r5f@5f00000 {
- compatible = "ti,j721e-r5f";
- reg = <0x5f00000 0x00008000>,
- <0x5f10000 0x00008000>;
- reg-names = "atcm", "btcm";
- ti,sci = <&dmsc>;
- ti,sci-dev-id = <248>;
- ti,sci-proc-ids = <0x09 0xFF>;
- resets = <&k3_reset 248 1>;
- atcm-enable = <1>;
- btcm-enable = <1>;
- loczrama = <1>;
- };
- };
-
c66_0: dsp@4d80800000 {
compatible = "ti,j721e-c66-dsp";
reg = <0x4d 0x80800000 0x00 0x00048000>,
@@ -507,100 +469,6 @@
resets = <&k3_reset 15 1>;
};
- usbss0: cdns_usb@4104000 {
- compatible = "ti,j721e-usb";
- reg = <0x00 0x4104000 0x00 0x100>;
- dma-coherent;
- power-domains = <&k3_pds 288 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 288 15>, <&k3_clks 288 3>;
- clock-names = "usb2_refclk", "lpm_clk";
- assigned-clocks = <&k3_clks 288 15>; /* USB2_REFCLK */
- assigned-clock-parents = <&k3_clks 288 16>; /* HFOSC0 */
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- phy@4108000 {
- compatible = "ti,j721e-usb2-phy";
- reg = <0x00 0x4108000 0x00 0x400>;
- };
-
- usb0: usb@6000000 {
- compatible = "cdns,usb3";
- reg = <0x00 0x6000000 0x00 0x10000>,
- <0x00 0x6010000 0x00 0x10000>,
- <0x00 0x6020000 0x00 0x10000>;
- reg-names = "otg", "xhci", "dev";
- interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
- <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, /* irq.6 */
- <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; /* otgirq.0 */
- interrupt-names = "host",
- "peripheral",
- "otg";
- maximum-speed = "super-speed";
- dr_mode = "otg";
- };
- };
-
- usbss1: cdns_usb@4114000 {
- compatible = "ti,j721e-usb";
- reg = <0x00 0x4114000 0x00 0x100>;
- dma-coherent;
- power-domains = <&k3_pds 289 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 289 15>, <&k3_clks 289 3>;
- clock-names = "usb2_refclk", "lpm_clk";
- assigned-clocks = <&k3_clks 289 15>; /* USB2_REFCLK */
- assigned-clock-parents = <&k3_clks 289 16>; /* HFOSC0 */
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- phy@4118000 {
- compatible = "ti,j721e-usb2-phy";
- reg = <0x00 0x4118000 0x00 0x400>;
- };
-
- usb1: usb@6400000 {
- compatible = "cdns,usb3";
- reg = <0x00 0x6400000 0x00 0x10000>,
- <0x00 0x6410000 0x00 0x10000>,
- <0x00 0x6420000 0x00 0x10000>;
- reg-names = "otg", "xhci", "dev";
- interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
- <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, /* irq.6 */
- <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; /* otgirq.0 */
- interrupt-names = "host",
- "peripheral",
- "otg";
- maximum-speed = "super-speed";
- dr_mode = "otg";
- };
- };
-
- ufs_wrapper: ufs-wrapper@4e80000 {
- compatible = "ti,j721e-ufs";
- reg = <0x0 0x4e80000 0x0 0x100>;
- power-domains = <&k3_pds 277 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 277 1>;
- assigned-clocks = <&k3_clks 277 1>;
- assigned-clock-parents = <&k3_clks 277 4>;
- ranges;
- #address-cells = <2>;
- #size-cells = <2>;
-
- ufs@4e84000 {
- compatible = "cdns,ufshc-m31-16nm", "jedec,ufs-2.0";
- reg = <0x0 0x4e84000 0x0 0x10000>;
- interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- freq-table-hz = <0 0>, <0 0>;
- clocks = <&k3_clks 277 0>, <&k3_clks 277 1>;
- clock-names = "core_clk", "phy_clk";
- assigned-clocks = <&k3_clks 277 1>;
- assigned-clock-parents = <&k3_clks 277 4>;
- dma-coherent;
- };
- };
-
main_i2c0: i2c@2000000 {
compatible = "ti,j721e-i2c", "ti,omap4-i2c";
reg = <0x0 0x2000000 0x0 0x100>;
Index: u-boot-2020.01+gitAUTOINC+2781231a33-g2781231a33/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
===================================================================
--- u-boot-2020.01+gitAUTOINC+2781231a33-g2781231a33.orig/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
+++ u-boot-2020.01+gitAUTOINC+2781231a33-g2781231a33/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
@@ -480,17 +480,6 @@
u-boot,dm-spl;
};
-&usbss0 {
- /delete-property/ power-domains;
- /delete-property/ assigned-clocks;
- /delete-property/ assigned-clock-parents;
- clocks = <&clk_19_2mhz>;
- clock-names = "usb2_refclk";
- pinctrl-names = "default";
- pinctrl-0 = <&main_usbss0_pins_default>;
- ti,vbus-divider;
-};
-
&main_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default>;
Index: u-boot-2020.01+gitAUTOINC+2781231a33-g2781231a33/arch/arm/dts/k3-j721e-tps65917-proc-board.dts
===================================================================
--- u-boot-2020.01+gitAUTOINC+2781231a33-g2781231a33.orig/arch/arm/dts/k3-j721e-tps65917-proc-board.dts
+++ u-boot-2020.01+gitAUTOINC+2781231a33-g2781231a33/arch/arm/dts/k3-j721e-tps65917-proc-board.dts
@@ -118,11 +118,3 @@
&main_sdhci1 {
vqmmc-supply = <&ldo1_reg>;
};
-
-&usbss0 {
- /delete-property/ ti,usb2-only;
-};
-
-&usb0 {
- dr_mode = "host";
-};Some modules cannot be disabled using k3conf.
Example: LPSC_PER_AUDIO domain cannot be disabled using k3conf.
| 139 | J721E_DEV_AASRC0 |
| 174 | J721E_DEV_MCASP0 |
| 175 | J721E_DEV_MCASP1 |