SPRAD13 May 2022 AM623 , AM625
PCB stack-up is one of the first and important considerations in realizing a successful PCB. AM62x device supports a BGA array or 25x25 with a 0.5mm pitch and a body size of 13mm. Due to the number of rows of signal balls around the periphery, it is recommended to have two routing layers. PDN compliance and robustness is critical to meet all the performance objectives of the device and associated peripherals. To enable this, it is recommended to allocate two layers for power planes. Ground planes will need to be added adjacent to the power planes and adjacent to the outer layers for shielding and controlled impedance routing. High speed interfaces such as DDR, CSI, USB require ground planes for impedance matching. Additionally, to meet the higher DDR interface speeds, ground layers both above and below the DDR signals are strongly recommended. The escapes on the AM62 board design was achieved with 6 layers as shown below.
| PCB Layer | Layer Routing, Planes, or Pours |
|---|---|
| Layer 1 | Component pads, Ground and signal escapes |
| Layer 2 | Signal Routing |
| Layer 3 | Ground/Power |
| Layer 4 | Power/Ground |
| Layer 5 | Signal Routing |
| Layer 6 | Ground |
| Table 1: Example PCB Layer Stack-up |
The AM62x board design example provided is implemented in a 6-layer stack-up as described above. This board is designed for optimum signal integrity on the high-speed interfaces while limiting the board size. The AM62x board is implemented without HDI (High Density Interconnect) and does not use micro vias, which are both intended to save board cost. All vias on the AM62 board are Plated Through Hole (PTH) and pass completely through the board. Proper analysis shall be performed to validate both signal and power integrity, if further optimizations are required to reduce PCB stack-up and/or routing rules illustrated in this document.