SPRADD8 November   2024 F29H850TU , F29H859TU-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction to Real-Time Control
  5. 2C29 CPU and Key Features
    1. 2.1 Parallel Architecture and Compiler Entitlement
  6. 3C29 Performance Benchmarks
    1. 3.1 Signal Chain Benchmark with ACI Motor Control
    2. 3.2 Real-time Control and DSP Performance
      1. 3.2.1 Examples and Factors Contributing to Results
        1. 3.2.1.1 Saturation (or Limiting) Example
        2. 3.2.1.2 Dead Zone Example
        3. 3.2.1.3 Space Vector Generation (SVGEN) Example
        4. 3.2.1.4 Software Pipelining
      2. 3.2.2 Customer Control and Math Benchmarks
    3. 3.3 General Purpose Processing (GPP) Performance
      1. 3.3.1 Examples and Factors Contributing to Results
        1. 3.3.1.1 Discontinuity Management
        2. 3.3.1.2 Switch() Example
    4. 3.4 Model-Based Design Benchmarks
    5. 3.5 Application Benchmarks
      1. 3.5.1 Single Phase 7kW OBC Description
      2. 3.5.2 Vienna Rectifier-Based Three Phase Power Factor Correction
      3. 3.5.3 Single-Phase Inverter
      4. 3.5.4 Machine Learning
    6. 3.6 Flash Memory Efficiency
    7. 3.7 Code-size Efficiency
  7. 4Summary
  8. 5References

C29 Performance Benchmarks

The C29 CPU is designed to offer at least double the performance of the C28 CPU at the same operating frequency. This section presents performance benchmarking results of the C29 versus C28 and competition CPUs, and in each case presents some analysis and insight into what aspects of the architecture and compiler enable that performance level.

Attention:

Unless otherwise mentioned, benchmarking occurred with the compiler settings optimized for speed (-O3 for C29 compiler) and run from zero wait-state memory. C29 benchmarking results can update over time, with updates to the C29 compiler. Current results are with the 0.1.0.STS version of the compiler.

Similarly, for competition devices, benchmarking occurred with compiler settings optimized for speed, and run from zero wait-state memory.