SPRADD8 November 2024 F29H850TU , F29H859TU-Q1
The ACI Motor Control Benchmark simulates the sensorless AC induction (ACI) motor control application. The application performs all the typical operations, including analog-to-digital converter (ADC) reads for sensing phase currents, transforming blocks that operate on the sensed current, and PWM writes to control phase voltages. No special external hardware is needed to provide stimulus as a block of code in the application models the behavior of an induction motor. To simulate closed loop behavior, the expected current from the motor model is fed into the ADC through the DAC modules. A single ADC is configured to sense the phase A and phase B currents sequentially through two channels. Phase C current is derived from phase A and phase B currents and is not sensed. Three PWM writes simulate control of duty cycle of the three phase A, B, and C voltages.
Figure 3-1 represents the execution blocks in the control loop interrupt routine of the benchmark application. The control loop interrupt is triggered at a rate of 2KHz and 1024 iterations of the control loop interrupt routine are executed before the application terminates. The "ACI Model" and "Inverse Clarke and DAC output" blocks represent code blocks that are not part of a real ACI motor control application, but are used in the benchmark for simulating the behavior of the motor.
Signal Chain Performance of Real-Time Control MCUs summarizes the real-time signal-chain performance of various competition MCUs targeted for real-time control applications. The results include several notable points:
MCU | CPU | CPU type | CPU frequency | Accelerator | Cycles | Perf. ratio | eMHz/Core |
---|---|---|---|---|---|---|---|
1 | Cortex-M7 | 6-stage superscalar pipeline, branch prediction | 480 | − | 1094 | 1 | 480 |
2 | Cortex-M4 | 3-stage pipeline, branch prediction | 170 | CORDIC | 838 | 1.30 | 220 |
3 | Proprietary A | 4-stage superscalar pipeline (dual-issue), branch prediction | 300 | − | 857 | 1.28 | 384 |
4 | Proprietary B | 5-stage pipeline, limited dual-issue | 200 | TFU | 894 | 1.22 | 244 |
5 | Proprietary C | 5-stage pipeline | 240 | − | 1295 | 0.84 | 202 |
AM263P | Cortex-R5F | 8-stage pipeline, limited dual-issue, branch prediction | 400 | TMU | 705 | 1.55 | 620 |
F2837x | C28 | 8-stage pipeline, limited dual-issue | 200 | TMU | 527 | 2.08 | 416 |
F29H85x | C29 | 9-stage pipeline VLIW (up to 8 instructions) | 200 | TMU | 254 | 4.31 | 862 |