The C29 ISA has specific designs and instructions targeted to improving specific performance characteristics, such as:

Real-Time Control and General Purpose Processing

MINMAXF: The MINMAXF instruction bounds a floating-point value present in an M register to a lower limit and an upper limit, specified in two other M registers.

QUADF: The QUADF instruction sets TDM register (a CPU status register) flags to break up the two dimensional vector system into 16 segments. By using a scaled value of the input co-ordinate values, the TDM flag results identifies the segment in a six-segment space-vector generation method. This approach can be extended to other space-vector variants as well.

Minimize Discontinuities for Decision Making Code

XC: The XC conditional execute instruction checks appropriate status flags A.Z, A.N, A.ZV and A.Z in the DSTS register, based on the selected instruction. Based on the flags value, a set of instruction packets either execute instructions or function as a NOP (no operation).

SELECT: The SELECT instruction uses a test condition to select between one of two source registers (such as A, D, or M registers), whose contents are then copied to a destination register of the same type.

Special Branches

The CPU supports a concepted called Delayed branches, which help achieve zero overhead on discontinuities (this is explained further below).

Branch instructions with conditions based on LUT functions using test flags (TA.MAP, TDM.MAP) are supported.

QDECB: The multiway QDECB conditional branch instruction checks the content of the A14 register. Based on the value of the A14 register, program execution either branches to one of four designated branch destinations or continues with the next instruction packet with a decrement of the A14 register.

DDECB: The multiway DDECB conditional branch instruction checks the content of the A14 register. Based on the value of the A14 register, program execution either branches to one of two designated branch destinations or continues with the next instruction packet with a decrement of the A14 register.

The advanced C29 compiler selects the appropriate instructions above, based on the need. In some cases, such as QUADF, use built-in intrinsics in C code to leverage the corresponding instruction and obtain optimized performance.