SPRADD8 November   2024 F29H850TU , F29H859TU-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction to Real-Time Control
  5. 2C29 CPU and Key Features
    1. 2.1 Parallel Architecture and Compiler Entitlement
  6. 3C29 Performance Benchmarks
    1. 3.1 Signal Chain Benchmark with ACI Motor Control
    2. 3.2 Real-time Control and DSP Performance
      1. 3.2.1 Examples and Factors Contributing to Results
        1. 3.2.1.1 Saturation (or Limiting) Example
        2. 3.2.1.2 Dead Zone Example
        3. 3.2.1.3 Space Vector Generation (SVGEN) Example
        4. 3.2.1.4 Software Pipelining
      2. 3.2.2 Customer Control and Math Benchmarks
    3. 3.3 General Purpose Processing (GPP) Performance
      1. 3.3.1 Examples and Factors Contributing to Results
        1. 3.3.1.1 Discontinuity Management
        2. 3.3.1.2 Switch() Example
    4. 3.4 Model-Based Design Benchmarks
    5. 3.5 Application Benchmarks
      1. 3.5.1 Single Phase 7kW OBC Description
      2. 3.5.2 Vienna Rectifier-Based Three Phase Power Factor Correction
      3. 3.5.3 Single-Phase Inverter
      4. 3.5.4 Machine Learning
    6. 3.6 Flash Memory Efficiency
    7. 3.7 Code-size Efficiency
  7. 4Summary
  8. 5References

Abstract

To meet emerging design trends for higher power density and complex control techniques in real-time applications, engineers need high-performance MCUs with more flash memory, larger computational capabilities, and higher levels of integrated functionality. Requirements are enabled through innovations in CPU architecture, such as the C29 CPU in TI C2000™ MCUs that has 64-bit architecture and advanced cybersecurity components, such as the safety and security unit (SSU). The SSU allows context isolation among threads running within the same CPU, enabling run-time security and freedom from interference (FFI), a feature typically found in microprocessors. The C29 core builds on TI’s market leading C28 core, delivering higher performance for general purpose and digital signal processing.

This white paper discusses the C29 core architecture, benefits of the SSU, and describes several performance benchmarks comparing MCUs with C29 cores to MCUs with other CPU core architectures. The paper describes the benefits of the parallel C29 architecture, and the performance entitlement achieved with the C29 compiler.