/****************************************************************************/
/* Linker Generated Copy Tables - Example #1                                */
/*                                                                          */
/* 3 separate tasks are loaded into 3 separate areas of target memory.      */
/* They all must be run in a common area of memory (overlay).  Before       */
/* each task is run, it is copied into its run space using a linker         */
/* generated copy table for each task.                                      */
/*                                                                          */
/* Two linker generated CRC tables are created.  One is for .task1_scn      */
/* and the other is for the UNION.  The UNION table will contain CRC        */
/* records for .task1_scn, .task2_scn and .task3_scn.                       */
/****************************************************************************/
-c
-x
ex1.obj
task1.obj
task2.obj
task3.obj
check_crc.obj
ref_crc.obj
-o ex1.out
-m ex1.map
-stack    0x1000
-heap     0x800
MEMORY
{
PAGE 0 : RESET(R):    origin = 0x000000, length =  0x00002
         VECTORS(R) : origin = 0x000002, length =  0x003FE
         PROG(R)    : origin = 0x3f0000, length =  0x10000
PAGE 1 : RAM1 (RW)  : origin = 0x000402 , length = 0x003FE
PAGE 1 : RAM2 (RW)  : origin = 0x001000 , length = 0x04000
PAGE 1 : RAM3 (RW)  : origin = 0x3e0000 , length = 0x08000
}
 
SECTIONS
{
   UNION
   {
      .task2_scn: load = RAM3, PAGE = 1, table(_task2_ctbl)
      .task3_scn: load = RAM3, PAGE = 1, table(_task3_ctbl)
      .task1_scn: load = RAM3, PAGE = 1, table(_task1_ctbl), 
                                         crc_table(_task1_crctbl)
   } run = PROG, PAGE = 0, crc_table(_union_crctbl, algorithm=CRC16_ALT)
   vectors  : load = VECTORS, PAGE = 0
   .text    : load = PROG, PAGE = 0
   .data    : load = 440h, PAGE = 1
   .cinit   : > PROG, PAGE = 0
   .ebss    : > RAM3, PAGE = 1
   .econst  : > RAM3, PAGE = 1
   .reset   : > RESET, PAGE = 0
   .stack   : > RAM2, PAGE = 1
   .sysmem  : > RAM2, PAGE = 1
   .esysmem : > RAM3, PAGE = 1
   .ovly     > RAM2, PAGE = 1
}