SPRUHM9H October 2014 – May 2024 TMS320F28075 , TMS320F28075-Q1 , TMS320F28076
During boot up, the boot ROM initializes the device clocking, depending upon the reset source, to assist in faster boot time response. Clock configurations are performed by the boot ROM code only for POR, XRS, and HIBERNATE reset types. For all other resets, the boot ROM starts executing with the clocks that were already set up before reset.
Source | Frequency | Description |
---|---|---|
INTOSC1 | 10MHz | Set as clock source, if missing clock is detected at power up or right after device reset. |
Reset Source | Clock State |
---|---|
POR/XRS/HIBERNATE | Bypassed PLL. |
PLL multiplier is set to 0x0 | |
Clock divider is set to /1. | |
All other Resets | Maintain clocks setup before device reset. |