SPRUHM9H October 2014 – May 2024 TMS320F28075 , TMS320F28075-Q1 , TMS320F28076
The DLB bit determines whether the digital loopback mode is on. DLB is described in Table 20-20.
Register | Bit | Name | Function | Type | Reset Value | |
---|---|---|---|---|---|---|
SPCR1 | 15 | DLB | Digital loopback mode | R/W | 0 | |
DLB = 0 | Digital loopback mode is disabled. | |||||
DLB = 1 | Digital loopback mode is enabled. |
In the digital loopback mode, the receive signals are connected internally through multiplexers to the corresponding transmit signals, as shown in Table 20-21. This mode allows testing of serial port code with a single DSP device; the McBSP receives the data the McBSP transmits.
This Receive Signal | Is Fed Internally by This Transmit Signal |
---|---|
MDR (receive data) | MDX (transmit data) |
MFSR (receive frame synchronization) | MFSX (transmit frame synchronization) |
MCLKR (receive clock) | MCLKX (transmit clock) |