Bits ABD and CDC in SCIFFCT control the autobaud
logic. The SCIRST bit can be enabled to make
autobaud logic work.
If ABD is set while CDC is 1, which indicates
auto-baud alignment, SCI transmit FIFO interrupt
occurs (TXINT). After the interrupt service, the
CDC bit must be cleared by software. If CDC
remains set even after interrupt service, there
can be no repeat interrupts.
- Enable autobaud-detect mode for the SCI by
setting the CDC bit (bit 13) in SCIFFCT and clearing the ABD bit (bit 15) by writing a 1
to ABDCLR bit (bit 14).
- Initialize the baud register to be 1 or less than
a baud rate limit of 500Kbps.
- Allow SCI to receive either character "A" or "a"
from a host at the desired baud rate. If the first
character is either "A" or "a", the
autobaud-detect hardware detects the incoming baud
rate and sets the ABD bit.
- The auto-detect hardware updates the baud rate
register with the equivalent baud value hex. The
logic also generates an interrupt to the CPU.
- Respond to the interrupt clear ADB bit by writing a 1 to ABD CLR (bit 14) of SCIFFCT register and disable further autobaud locking by clearing CDC bit by writing a 0.
- Read the receive buffer for character "A" or "a" to empty the buffer and buffer status.
- If ABD is set while CDC is 1, which indicates
autobaud alignment, the SCI transmit FIFO
interrupt occurs (TXINT). After the interrupt
service, the CDC bit must be cleared by
software.
Note: At higher baud rates, the slew rate of the
incoming data bits can be affected by transceiver
and connector performance. While normal serial
communications can work well, this slew rate can
limit reliable autobaud detection at higher baud
rates (typically beyond 100k baud) and cause the
auto-baudlock feature to fail.
To
avoid this, the following is recommended:
- Achieve a baud-lock between the host and C28x SCI
boot loader using a lower baud rate.
- The host can then handshake with the loaded C28x
application to set the SCI baud rate register to
the desired higher baud rate.