3.5 Clocks

The SoC supports up to two primary clock inputs. The device clock (OSC0) is sourced with a 20-MHz clock. The auxiliary clock (OSC1) is sourced with a 22.5792-MHz clock. Both clocks are sourced from a clock synthesizer (CDC925).

In addition to the SoC clock inputs, the EVM includes other clock sources. A 25-MHz clock is provided to Ethernet PHY(s) and a 100-MHz clock is sourced for miniPCIe. Both the SoC and Ethernet clocks are sourced from a clock synthesizer (CDC925).