SPRUIF3B May 2017 – March 2019 DRA790 , DRA791 , DRA793 , DRA797
Figure 10 is part of the SoC pinmux table for GPMC. The SoC device supports additional functions not shown in the table. The functions shown are intended to reflect those supported on the EVM. These functions include:
MUX B: Selects between NOR and NAND memories, LCD panel for video, and expansion. The selection is made using the I/O expander 2, bits P7 and P0. The defaults is set to enable GPMC to NOR and NAND memories – which is required for SYSBOOT mode latching. Figure 11 shows the MUX diagram for GPMC, VIN1, and VOUT3