SPRUIG3C January 2018 – August 2019 TDA4VM , TDA4VM-Q1
VCOP can perform rounding or truncation in conjunction with stores. The migration tool treats these as discrete operations and generates them prior to the store.
Rounding is translated as if it were an arithmetic operation. That is, a rounding store of the form:
out[Agen] = Vsrc.round(N); // round at Nth bit
is translated as if were expressed as:
Vbits = N;
Vtemp = Vsrc.round(Vbits); // VSHRRW
out[Agen] = Vtemp;
Rounding adds one instruction in addition to the normal store instruction or sequence.
Similarly, truncation is translated as a discrete right shift. A truncating store of the form:
out[Agen] = Vreg.truncate(N);
is translated as if it were:
Vbits = -N; // negate so shift goes right
Vtemp = Vsrc << Vbits; // actually >>
out[Agen] = Vtemp;
This also results in one additional instruction.