SPRUIM6A October   2018  – November 2020

 

  1. 1Introduction
    1. 1.1 Key Features
  2. 2AM65x IDK Overview
  3. 3Common Processor Board
    1. 3.1 Key Features
    2. 3.2 Functional Block Diagram
    3. 3.3 Overview of Common Processor Board
      1. 3.3.1  Clocking
        1. 3.3.1.1 RTC Clock
        2. 3.3.1.2 Maxwell SoC Clock
        3. 3.3.1.3 Ethernet PHY Clocks
        4. 3.3.1.4 SERDES Clock
      2. 3.3.2  Reset
      3. 3.3.3  Power Requirements
        1. 3.3.3.1 Power Input
        2. 3.3.3.2 Overvoltage and Undervoltage Protection Circuit
        3. 3.3.3.3 Voltage Supervisor
        4. 3.3.3.4 Current Monitoring
        5. 3.3.3.5 Power Supply
        6. 3.3.3.6 Power Sequencing
        7. 3.3.3.7 SoC Power
      4. 3.3.4  Configuration
        1. 3.3.4.1 Boot Modes
        2. 3.3.4.2 JTAG
          1. 3.3.4.2.1 Test Automation
        3. 3.3.4.3 UART Interface
      5. 3.3.5  Memory Interfaces
        1. 3.3.5.1 DDR4 Interface
        2. 3.3.5.2 MMC Interface
          1. 3.3.5.2.1 SDHC Interface
          2. 3.3.5.2.2 eMMC Interface
        3. 3.3.5.3 OSPI Interface
        4. 3.3.5.4 SPI NOR Flash Interface
        5. 3.3.5.5 Board ID EEPROM Interface
        6. 3.3.5.6 Boot EEPROM Interface
      6. 3.3.6  Ethernet Interface
        1. 3.3.6.1 Gigabit Ethernet PHY Default Configuration
        2. 3.3.6.2 Ethernet LEDs
      7. 3.3.7  LCD Display Interface
      8. 3.3.8  USB 2.0 Interface
      9. 3.3.9  CSI-2 Interface
      10. 3.3.10 Application Card Interface
      11. 3.3.11 SERDES Interface
      12. 3.3.12 GPMC/DSS Interface
      13. 3.3.13 I2C Interface
      14. 3.3.14 SPI Interface
      15. 3.3.15 Timer and Interrupt
        1. 3.3.15.1 Timer
        2. 3.3.15.2 Interrupt
      16. 3.3.16 Fan Connector
  4. 4IDK Application Card
    1. 4.1 Key Features
    2. 4.2 Overview of IDK Application Board
      1. 4.2.1 Application Card Connector
      2. 4.2.2 Profibus Interface
      3. 4.2.3 CAN Interface
      4. 4.2.4 Rotary Switch
      5. 4.2.5 Industrial I/O Terminal Connector
      6. 4.2.6 Ethernet Interface
      7. 4.2.7 Board ID Memory
      8. 4.2.8 Power Supply
  5. 5x2 Lane PCIe Personality Card
    1. 5.1 Key Features
    2. 5.2 Overview of PCIex2 Daughter Card
      1. 5.2.1 Personality Card Connectors
      2. 5.2.2 USB 2.0 Interface
      3. 5.2.3 PCIe Interface
      4. 5.2.4 x2 Lane PCIe Personality Card Clocking
      5. 5.2.5 Board ID EEPROM Interface
      6. 5.2.6 x2 Lane PCIe Personality Card Power
  6. 6Known Issues
    1. 6.1 Determining the Revision and Date Code for the EVM
    2. 6.2 Known Issues for the A, E4, and E3 Revision
      1. 6.2.1 Lack of Reset for I2C IO Expander
    3. 6.3 Known Issues for the E4 & E3 Revision
      1. 6.3.1 Changes Unique to the E4 Revision Modified for 2.0 Revision
    4. 6.4 Known Issues for the E3 Revision
      1. 6.4.1 Resonance Observed on the SoC Side of Some Filters Associated with VDDA_1V8
      2. 6.4.2 Additional LDO Power Supply Needed for VDDA_1P8_SERDES0
      3. 6.4.3 Length of the RESET Signal to the PCIE Connectors on the SERDES Daughter Card
      4. 6.4.4 The PORz_OUT and MCU_PORz_OUT Signals Go High During Power Sequencing
      5. 6.4.5 Orientation of the Current Monitoring Shunt Resistors
      6. 6.4.6 SD Card IO Supply Capacitance
      7. 6.4.7 PHY Resistor Strapping Changed to Disable EEE Mode
      8. 6.4.8 The I2C Address for the I2C Boot Memory changed to 0x52
  7. 7Configuring the PRG0 and PRG1 Ethernet Interface to MII
    1. 7.1 Ethernet PHY Initial Conditions and TX Clock Signal Change
      1. 7.1.1 Ethernet PHY0 Clock and Initial Condition for MII
      2. 7.1.2 Ethernet PHY1 Clock and Initial Condition for MII
      3. 7.1.3 Ethernet PHY2 Clock and Initial Condition for MII
      4. 7.1.4 Ethernet PHY3 Clock and Initial Condition for MII
    2. 7.2 Ethernet PHY and TX Data Signals Change
      1. 7.2.1 Ethernet PHY0 TX Data Signals for MII
      2. 7.2.2 Ethernet PHY1 TX Data Signals for MII
      3. 7.2.3 Ethernet PHY2 TX Data Signals for MII
      4. 7.2.4 Ethernet PHY3 TX Data Signals for MII
  8. 8Revision History

4.2.1 Application Card Connector

There are two connectors provided on this card for plugging into the common processor card. A 120-pin connector (J17) and A 60-pin connector (J16) are used. These connectors provide power and data interface for the card.

Table 4-1 120-pin Application Connector (J17) Pin-out
Pin NumberSignal NamePin NumberSignal Name
1DGND2DGND
3ETH0_CLK4ETH1_CLK
5DGND6DGND
7ETH0_RGMII_TD38ETH1_MII_RXER
9ETH0_RGMII_TD110ETH_LED1
11ETH0_RGMII_TD212ETH_LED3
13ETH0_RGMII_TX_CTL14PRG0_IEP0_LATCH_IN0
15ETH0_RGMII_TD016ETH0_LED_LINK
17DGND18ETH0/1_INTN
19ETH0_RGMII_TXC20ETH0_LED_LINK
21DGND22ETH1_LED_LINK
23ETH0_RGMII_RD324ETH_LED2
25DGND26ETH1_RGMII_RX_CTL
27ETH0_RGMII_RXC28ETH1_RGMII_RD3
29DGND30ETH1_RGMII_RD0
31ETH0_RGMII_RX_CTL32ETH1_RGMII_RD2
33ETH0_RGMII_RD234ETH1_RGMII_RD1
35ETH0_RGMII_RD036DGND
37ETH0_MII_RXER38ETH1_RGMII_TXC
39ETH0_RGMII_RD140DGND
41ETH1_LED_LINK42ETH1_RGMII_TD3
43GPIO_ETH2/3_RESETN44ETH1_RGMII_TD2
45GPIO_ETH0/1_RESETN46ETH1_RGMII_TD1
47ETH_LED448ETH1_RGMII_TX_CTL
49ETH2/3_INTN50ETH1_RGMII_TD0
51PRG0_IEP1_LATCH_IN052DGND
53ETH0/1_MDIO54ETH1_RGMII_RXC
55ETH3_MII_RXER56DGND
57ETH3_LED_LINK58ETH2_LED_LINK
59ETH0/1_MDC60ETH2_MII_RXER
61RS485_UART_TX62IDK_IOEXP_LDN_1V8
63ETH3_RGMII_RD064RS485_UART_RX
65ETH3_RGMII_RX_CTL66ETH2_LED_LINK
67ETH3_RGMII_RD168ETH_LED7
69DGND70ETH_LED5
71ETH3_RGMII_RXC72PRG1_IEP0_LATCH_IN0
73DGND74RS485_UART_RTSN
75ETH3_RGMII_RD376ETH2_RGMII_RD1
77ETH3_RGMII_RD278ETH2_RGMII_RX_CTL
79ETH3_RGMII_TD080ETH2_RGMII_RD2
81ETH3_RGMII_TX_CTL82DGND
83ETH3_RGMII_TD384ETH2_RGMII_RXC
85DGND86DGND
87ETH3_RGMII_TXC88ETH2_RGMII_RD0
89DGND90ETH2_RGMII_RD3
91ETH3_RGMII_TD192DGND
93ETH3_RGMII_TD294ETH2_RGMII_TXC
95ETH2/3_MDC96DGND
97DGND98ETH2_RGMII_TX_CTL
99ETH2/3_MDIO100ETH2_RGMII_TD2
101DGND102ETH2_RGMII_TD3
103ETH3_CLK104DGND
105DGND106ETH2_CLK
107DGND108DGND
109DGND110ETH2_RGMII_TD0
111DGND112DGND
113PRESENSE_DETECT114ETH2_RGMII_TD1
115DGND116DGND
117DGND118DGND
119DGND120DGND
Table 4-2 60-pin Application Connector (J17) Pin-out
Pin NumberSignal NamePin NumberSignal Name
1VCC_3V32VCC_5V0
3VCC_3V34VCC_5V0
5VCC_3V36VCC_5V0
7NC8NC
9NC10NC
11NC12NC
13DGND14NC
15EEPROM_I2C_SCL16NC
17EEPROM_I2C_SDA18DGND
19DGND20IDK_SPI_CLK_3V3
21IDK_I2C_SCL_C22DGND
23IDK_I2C_SDA_C24IDK_SPI_CSN_3V3
25DGND26NC
27PRG1_IEP1_LATCH_IN028IDK_SPI_MISO_3V3
29ETH_LED830CAN0_TX
31ETH_LED632CAN0_RX
33ETH3_LED_LINK34CAN1_TX
35NC36CAN1_RX
37NC38PORZ_OUT
39NC40EEPROM_A0
41NC42EEPROM_A1
43NC44EEPROM_A2
45NC46NC
47NC48NC
49NC50NC
51NC52VCC_2V5
53NC54VCC_2V5
55VCC_1V856VCC_1V0
57VCC_1V858VCC_1V0
59VCC_1V860VCC_1V0
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