SPRUIW3 October   2021 TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1

 

  1.   Trademarks
  2. 1Feature Differences Between F28004x and F28003x
    1. 1.1 F28004x and F28003x Feature Comparison
  3. 2PCB Hardware Changes
    1. 2.1 PCB Hardware Changes for the 100-Pin PZ Package
      1. 2.1.1 100-Pin PZ Migration for Existing PCB
      2. 2.1.2 100-Pin PZ Migration for New PCB Design
    2. 2.2 PCB Hardware Changes for the 64-Pin PM Package
      1. 2.2.1 64-Pin PM Migration for New and Existing PCB
  4. 3Feature Differences for System Consideration
    1. 3.1 New Features in F28003x
      1. 3.1.1  TMU Type1
      2. 3.1.2  Fast Integer Division (FINTDIV)
      3. 3.1.3  Host Interface Controller (HIC)
      4. 3.1.4  Background CRC (BGCRC)
      5. 3.1.5  Standby Low Power Mode
      6. 3.1.6  X1 GPIO Functionality
      7. 3.1.7  Diagnostic Features (PBIST/HWBIST)
      8. 3.1.8  Advance Encryption Standard (AES)
      9. 3.1.9  Secure Boot/JTAG Lock
      10. 3.1.10 Modular Controller Area Network (MCAN)
      11. 3.1.11 Embedded Pattern Generator (EPG)
      12. 3.1.12 Live Firmware Update (LFU)
    2. 3.2 Communication Module Changes
    3. 3.3 Control Module Changes
    4. 3.4 Analog Module Differences
    5. 3.5 Other Device Changes
      1. 3.5.1 XTAL Module
      2. 3.5.2 PLL
      3. 3.5.3 PIE Channel Mapping
      4. 3.5.4 Bootrom
      5. 3.5.5 CLB and Motor Control Libraries
      6. 3.5.6 ERAD
      7. 3.5.7 GPIO
      8. 3.5.8 AGPIO
      9. 3.5.9 ERROR Status
    6. 3.6 Power Management
      1. 3.6.1 LDO/VREG
      2. 3.6.2 DCDC
      3. 3.6.3 POR/BOR
      4. 3.6.4 Power Consumption
    7. 3.7 Memory Module Changes
    8. 3.8 GPIO Multiplexing Changes
    9. 3.9 Analog Multiplexing Changes
  5. 4Application Code Migration From F28004x to F28003x
    1. 4.1 C2000Ware Header Files
    2. 4.2 Linker Command Files
    3. 4.3 Minimum Compiler Version Requirement for TMU Type 1
    4. 4.4 C2000Ware Examples
  6. 5Specific Use Cases Related to F28003x New Features
    1. 5.1 HIC
    2. 5.2 FINTDIV
    3. 5.3 TMU Type1
    4. 5.4 AES
    5. 5.5 MCAN
    6. 5.6 EPG
  7. 6EABI Support
    1. 6.1 Flash API
    2. 6.2 NoINIT Struct Fix (Linker Command)
    3. 6.3 Pre-Compiled Libraries
  8. 7References

3.2 Communication Module Changes

Communication module changes between the F28004x and F28003x devices affect the number of modules, addition of CAN-FD, HIC and some differences on the FSI module in F28003x. Module functionality is maintained for both devices. Table 3-1 shows the module instances and differences which should be considered when migrating applications between F28004x and F28003x.

Table 3-1 Communication Module Instances
Module Category F28004x F28003x Notes
LIN Number 1 - LINA 2 - LINA, LINB
CAN Number 2 - CANA, CANB 1- CANA
CAN-FD Number not present 1 - MCANA
SCI Number 2 - SCIA, SCIB 2 - SCIA, SCIB
SPI Number 2 - SPIA, SPIB 2 - SPIA, SPIB
I2C Number 1 - I2CA 2 -I2CA, I2CB
PMBUS Number 1 - PMBUSA 1 - PMBUSA
HIC Number not present 1 - HICA
FSI Number 1 - FSIA 1 - FSIA Updates on F28003x due to daisy chain improvements
Register - TX_OPER_CTRL_LO.TDM_ENABLE Input TDM port select bit
- TX_OPER_CTRL_LO.SEL_TDM_IN Transmit TDM Mode Enable bit
- TX_OPER_CTRL_HI.EXT_TRIG_SEL External Trigger Select bit
- TX_DLYLINE_CTRL Transmit delay line control register
- RX_MASTER_CTRL.INPUT_ISOLATE Isolate FSI RX Inputs
- RX_MASTER_CTRL.DATA_FILTER_EN Data filter enable bit
- RX_EVT_STS.PING_TAG_MATCH Ping Tag Match Flag
- RX_EVT_STS.DATA_TAG_MATCH Data Tag Match Flag
- RX_EVT_STS.ERROR_TAG_MATCH Error Tag Match Flag
- RX_EVT_CLR.PING_TAG_MATCH Ping Tag Match Flag clear bit
- RX_EVT_CLR.DATA_TAG_MATCH Data Tag Match Flag clear bit
- RX_EVT_CLR.ERROR_TAG_MATCH Error Tag Match Flag clear bit
- RX_EVT_FRC.PING_TAG_MATCH Ping Tag Match Flag force bit
- RX_EVT_FRC.DATA_TAG_MATCH Data Tag Match Flag force bit
- RX_EVT_FRC.ERROR_TAG_MATCH Error Tag Match Flag force bit
- RX_INT1_CTRL.INT1_EN_PING_TAG_MATCH Enable Ping Tag Match Interrupt 1
- RX_INT1_CTRL.INT1_EN_DATA_TAG_MATCH Enable Data Tag Match Interrupt 1
- RX_INT1_CTRL.INT1_EN_ERROR_TAG_MATCH Enable Error Tag Match Interrupt 1
- RX_INT2_CTRL.INT2_EN_PING_TAG_MATCH Enable Ping Tag Match Interrupt 2
- RX_INT2_CTRL.INT2_EN_DATA_TAG_MATCH Enable Data Tag Match Interrupt 2
- RX_INT2_CTRL.INT2_EN_ERROR_TAG_MATCH Enable Error Tag Match Interrupt 2
- RX_TRIG_CTRL_0 Receive Trigger Control register 0
- RX_TRIG_WIDTH_0 Receive Trigger Wdith register 0
- RX_TRIG_CTRL_1 Receive Trigger Control register 1
- RX_TRIG_CTRL_2 Receive Trigger Control register 2
- RX_TRIG_CTRL_3 Receive Trigger Control register 3
- RX_UDATA_FILTER Receive User Data Filter Control register
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